Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/52223
Title: | Low depth, low power carry lookahead adders using threshold logic | Authors: | Celinski, Peter López Feliciano, José Francisco Al-Sarawi, S. Abbott, Derek |
Keywords: | Gate | Issue Date: | 2002 | Publisher: | 0026-2692 | Journal: | Microelectronics | Conference: | Conference on Electronics andStructures for MEMS | Abstract: | This paper describes a low power threshold logic-gate based on a capacitive input, charge recycling differential sense amplifier latch. The gate is shown to have low power dissipation and high operating speed, as well as robustness under process, temperature and supply voltage variations. This is followed by the main result, which is the development of a novel, low depth. carry lookahead addition scheme based on threshold logic. One such adder is also designed and simulated using the proposed gate. (C) 2002 Published by Elsevier Science Ltd. | URI: | http://hdl.handle.net/10553/52223 | ISSN: | 0026-2692 | DOI: | 10.1016/S0026-2692(02)00112-X | Source: | Microelectronics Journal[ISSN 0026-2692],v. 33, p. 1071-1077 |
Appears in Collections: | Actas de congresos |
SCOPUSTM
Citations
14
checked on Nov 17, 2024
WEB OF SCIENCETM
Citations
13
checked on Nov 17, 2024
Page view(s)
78
checked on Jul 27, 2024
Google ScholarTM
Check
Altmetric
Share
Export metadata
Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.