Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/50497
DC FieldValueLanguage
dc.contributor.authorSantana, Oliverio J.en_US
dc.contributor.authorRamirez, Alexen_US
dc.contributor.authorValero, Mateoen_US
dc.date.accessioned2018-11-24T16:29:56Z-
dc.date.available2018-11-24T16:29:56Z-
dc.date.issued2007en_US
dc.identifier.issn0018-9340en_US
dc.identifier.urihttp://hdl.handle.net/10553/50497-
dc.description.abstractThe stream fetch engine is a high-performance fetch architecture based on the concept of an instruction stream. We call a sequence of instructions from the target of a taken branch to the next taken branch, potentially containing multiple basic blocks, a stream. The long length of instruction streams makes it possible for the stream fetch engine to provide a high fetch bandwidth and to hide the branch predictor access latency, leading to performance results close to a trace cache at a lower implementation cost and complexity. Therefore, enlarging instruction streams is an excellent way to improve the stream fetch engine. In this paper, we present several hardware and software mechanisms focused on enlarging those streams that finalize at particular branch types. However, our results point out that focusing on particular branch types is not a good strategy due to Amdahl's law. Consequently, we propose the multiple-stream predictor, a novel mechanism that deals with all branch types by combining single streams into long virtual streams. This proposal tolerates the prediction table access latency without requiring the complexity caused by additional hardware mechanisms like prediction overriding. Moreover, it provides high-performance results which are comparable to state-of-the-art fetch architectures but with a simpler design that consumes less energy.-
dc.languageengen_US
dc.publisher0018-9340-
dc.relation.ispartofIEEE Transactions on Computersen_US
dc.sourceIEEE Transactions on Computers[ISSN 0018-9340],v. 56, p. 1342-1357en_US
dc.subject330406 Arquitectura de ordenadoresen_US
dc.titleEnlarging instruction streamsen_US
dc.typeinfo:eu-repo/semantics/Articlees
dc.typeArticlees
dc.identifier.doi10.1109/TC.2007.70742-
dc.identifier.scopus34548767664-
dc.identifier.isi000248891000005-
dc.contributor.authorscopusid7003605046-
dc.contributor.authorscopusid7401734996-
dc.contributor.authorscopusid24475914200-
dc.description.lastpage1357-
dc.description.firstpage1342-
dc.relation.volume56-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Artículoen_US
dc.contributor.daisngid3401331-
dc.contributor.daisngid440299-
dc.contributor.daisngid41870-
dc.contributor.wosstandardWOS:Santana, OJ-
dc.contributor.wosstandardWOS:Ramirez, A-
dc.contributor.wosstandardWOS:Valero, M-
dc.date.coverdateOctubre 2007-
dc.identifier.ulpgces
dc.description.jcr1,68
dc.description.jcrqQ1
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.author.deptSIANI: Inteligencia Artificial, Robótica y Oceanografía Computacional-
crisitem.author.deptIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.deptDepartamento de Informática y Sistemas-
crisitem.author.orcid0000-0001-7511-5783-
crisitem.author.parentorgIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.fullNameSantana Jaria, Oliverio Jesús-
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