Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/50489
DC FieldValueLanguage
dc.contributor.authorRamirez, Tanausúen_US
dc.contributor.authorPajuelo, Alexen_US
dc.contributor.authorSantana, Oliverio Jesusen_US
dc.contributor.authorMutlu, Onuren_US
dc.contributor.authorValero, Mateoen_US
dc.date.accessioned2018-11-24T16:26:15Z-
dc.date.available2018-11-24T16:26:15Z-
dc.date.issued2010en_US
dc.identifier.isbn9781450301787en_US
dc.identifier.issn1089-795Xen_US
dc.identifier.urihttp://hdl.handle.net/10553/50489-
dc.description.abstractRunahead Threads (RaT) is a promising solution that enables a thread to speculatively run ahead and prefetch data instead of stalling for a long-latency load in a simultaneous multithreading processor. With this capability, RaT can reduces resource monopolization due to memory-intensive threads and exploits memory-level parallelism, improving both system performance and single-thread performance. Unfortunately, the benefits of RaT come at the expense of increasing the number of executed instructions, which adversely affects its energy efficiency. In this paper, we propose Runahead Distance Prediction (RDP), a simple technique to improve the efficiency of Runahead Threads. The main idea of the RDP mechanism is to predict how far a thread should run ahead speculatively such that speculative execution is useful. By limiting the runahead distance of a thread, we generate efficient runahead threads that avoid unnecessary speculative execution and enhance RaT energy efficiency. By reducing runahead-based speculation when it is predicted to be not useful, RDP also allows shared resources to be efficiently used by non-speculative threads. Our results show that RDP significantly reduces power consumption while maintaining the performance of RaT, providing better performance and energy balance than previous proposals in the field. © 2010 ACM.
dc.languageengen_US
dc.publisher1089-795Xen_US
dc.relation.ispartofParallel Architectures and Compilation Techniques - Conference Proceedings, PACTen_US
dc.sourceParallel Architectures and Compilation Techniques - Conference Proceedings, PACT[ISSN 1089-795X],v. 2010, p. 443-452en_US
dc.subject330406 Arquitectura de ordenadoresen_US
dc.titleEfficient runahead threadsen_US
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.typeConferenceObjectes
dc.identifier.doi10.1145/1854273.1854328
dc.identifier.scopus78149239001-
dc.contributor.authorscopusid35608297100-
dc.contributor.authorscopusid9733817100-
dc.contributor.authorscopusid7003605046-
dc.contributor.authorscopusid16043006700-
dc.contributor.authorscopusid24475914200-
dc.description.lastpage452-
dc.description.firstpage443-
dc.relation.volume2010-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.date.coverdateEnero 2010
dc.identifier.ulpgces
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.author.deptGIR SIANI: Inteligencia Artificial, Robótica y Oceanografía Computacional-
crisitem.author.deptIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.deptDepartamento de Informática y Sistemas-
crisitem.author.orcid0000-0001-7511-5783-
crisitem.author.parentorgIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.fullNameSantana Jaria, Oliverio Jesús-
Appears in Collections:Actas de congresos
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