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Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/49683
DC FieldValueLanguage
dc.contributor.authorGarcía, José C.en_US
dc.contributor.authorMontiel-Nelson, Juan A.en_US
dc.contributor.authorNooshabadi, Saeiden_US
dc.contributor.otherMontiel-Nelson, Juan-
dc.date.accessioned2018-11-24T09:52:14Z-
dc.date.available2018-11-24T09:52:14Z-
dc.date.issued2005en_US
dc.identifier.isbn0-8194-5832-5en_US
dc.identifier.issn0277-786Xen_US
dc.identifier.urihttp://hdl.handle.net/10553/49683-
dc.description.abstractIn this paper, we propose a high performance direct bootstrapped CMOS latched driver circuit (J-driver). It is a 28% faster and occupies a 58% less active area as compared to a counterpart circuit (L-driver) using indirect bootstrap technique. In addition, our driver J-driver reduces the power consumption by a 2% in driving capacitive loads from 1pF to 6pF. The challenge in designing this latched driver is to appropriately trade-off performance against the active area.en_US
dc.languageengen_US
dc.relation.ispartofProceedings of SPIE - The International Society for Optical Engineeringen_US
dc.sourceProceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5837 PART I (37), p. 329-338en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherLogicen_US
dc.subject.otherTransistorsen_US
dc.subject.otherCapacitanceen_US
dc.subject.otherPicosecond phenomenaen_US
dc.subject.otherCapacitorsen_US
dc.subject.otherCMOS technologyen_US
dc.subject.otherDevice simulationen_US
dc.titleA CMOS latched driver using bootstrap technique for low-voltage applicationsen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conferenceConference on VLSI Circuits and Systems IIen_US
dc.identifier.doi10.1117/12.608300en_US
dc.identifier.scopus28344436556-
dc.identifier.isi000231723000034-
dcterms.isPartOfVLSI Circuits and Systems II, Pts 1 and 2-
dcterms.sourceVLSI Circuits and Systems II, Pts 1 and 2[ISSN 0277-786X],v. 5837, p. 329-338-
dc.contributor.authorscopusid9639270900-
dc.contributor.authorscopusid6603626866-
dc.contributor.authorscopusid6602486254-
dc.description.lastpage338en_US
dc.identifier.issue37-
dc.description.firstpage329en_US
dc.relation.volume5837 PART Ien_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.identifier.wosWOS:000231723000034-
dc.contributor.daisngid3023904-
dc.contributor.daisngid1897928-
dc.contributor.daisngid480589-
dc.contributor.daisngid15031512-
dc.contributor.daisngid184255-
dc.identifier.investigatorRIDK-6805-2013-
dc.utils.revisionSíen_US
dc.contributor.wosstandardWOS:Garcia, JC-
dc.contributor.wosstandardWOS:Montiel-Nelson, JA-
dc.contributor.wosstandardWOS:Nooshabadi, S-
dc.date.coverdateDiciembre 2005en_US
dc.identifier.conferenceidevents120464-
dc.identifier.ulpgcSíes
item.grantfulltextopen-
item.fulltextCon texto completo-
crisitem.event.eventsstartdate09-05-2005-
crisitem.event.eventsenddate11-05-2005-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-4323-8097-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameGarcía Montesdeoca,José Carlos-
crisitem.author.fullNameMontiel Nelson, Juan Antonio-
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