Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/49644
DC FieldValueLanguage
dc.contributor.authorMontiel-Nelson, J. A.en_US
dc.contributor.authorGarcía-Montesdeoca, José C.en_US
dc.contributor.authorNooshabadi, Saeiden_US
dc.contributor.authorSosa, J.en_US
dc.date.accessioned2018-11-24T09:34:45Z-
dc.date.available2018-11-24T09:34:45Z-
dc.date.issued2011en_US
dc.identifier.isbn9781612848570en_US
dc.identifier.issn1548-3746en_US
dc.identifier.otherWoS-
dc.identifier.urihttp://hdl.handle.net/10553/49644-
dc.description.abstractIn this paper, we present a novel methodology based on Mixed Integer Linear Programming (MILP) for obtaining the complete design tradeoff curve of heterogeneous adders. For each optimal design point of the tradeoff curve, our approach determines both the number of subadders, the architecture of each subadder and the bit width of each subadder. In order to reduce the number of binary variables in the formulation of the MILP, we introduce a new modeling of non-convex curves. Comparisons using five different adder architectures implemented in a standard cells 65nm CMOS technology are shown. Experimental results reveal that the proposed design space exploration methodology is better, when compared with the best published work, up to 11.73 times and 2.16 times in average in terms of CPU time.en_US
dc.languageengen_US
dc.relation.ispartofMidwest Symposium on Circuits and Systemsen_US
dc.sourceMidwest Symposium on Circuits and Systems[ISSN 1548-3746] (6026380)en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherDelayen_US
dc.subject.otherAddersen_US
dc.subject.otherCMOS logic circuitsen_US
dc.subject.otherIP networksen_US
dc.subject.otherLogic designen_US
dc.titleA high-level design exploration of heterogeneous adders based on Mixed Integer Linear Programmingen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conference54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011en_US
dc.identifier.doi10.1109/MWSCAS.2011.6026380en_US
dc.identifier.scopus80053635648-
dc.identifier.isi000296057200117-
dc.contributor.authorscopusid7006310063-
dc.contributor.authorscopusid6603626866-
dc.contributor.authorscopusid22937461700-
dc.contributor.authorscopusid6602486254-
dc.identifier.issue6026380-
dc.investigacionIngeniería y Arquitecturaen_US
dc.investigacionCienciasen_US
dc.type2Actas de congresosen_US
dc.contributor.daisngid1739656-
dc.contributor.daisngid480589-
dc.contributor.daisngid8003951-
dc.contributor.daisngid184255-
dc.description.numberofpages4en_US
dc.identifier.eisbn978-1-61284-857-0-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Sosa, J-
dc.contributor.wosstandardWOS:Montiel-Nelson, JA-
dc.contributor.wosstandardWOS:Garcia-Montesdeoca, JC-
dc.contributor.wosstandardWOS:Nooshabadi, S-
dc.date.coverdateOctubre 2011en_US
dc.identifier.conferenceidevents120770-
dc.identifier.ulpgces
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.event.eventsstartdate07-08-2011-
crisitem.event.eventsenddate10-08-2011-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-4323-8097-
crisitem.author.orcid0000-0003-1838-3073-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameMontiel Nelson, Juan Antonio-
crisitem.author.fullNameGarcía Montesdeoca,José Carlos-
crisitem.author.fullNameSosa González, Carlos Javier-
Appears in Collections:Actas de congresos
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