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Title: High performance CMOS level up shifter with full-scale 1.2 V output voltage
Authors: Montiel-Nelson, Juan A. 
Nooshabadi, S. 
García, José Carlos 
UNESCO Clasification: 330790 Microelectrónica
Keywords: CMOS technology
Level shifter
Single supply voltage
High speed
Low energy consumption, et al
Issue Date: 2018
Publisher: 0026-2692
Journal: Microelectronics 
Abstract: This paper introduces a very low static current CMOS level up shifter for low voltage single supply and high performance. The proposed low to high voltage level shifter is implemented using low threshold voltage transistors in 65 nm CMOS technology and based on differential topology. The shifter circuit was designed to be functional for an input voltage from 0.45 up to 1.2 V. Driving a 450 fF of capacitive load, the shifter's energy-delay product (EPD) is a 54% lower than a similar single supply level up shifter. Post-layout simulations, for every technological corner, temperature range from 25 up to 125 degrees C, operating input voltages and output capacitive loads (maximum of 740 fF), demonstrate the topology is fully functional without any impact on the static power consumption and the operating frequency of 500 MHz. Monte Carlo analysis shows the robustness of the proposed shifter within a 3 sigma device mismatch.
ISSN: 0026-2692
DOI: 10.1016/j.mejo.2018.05.014
Source: Microelectronics [ISSN 0026-2692], v. 78, p. 11-15
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