Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/49291
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jia, Zai N. | en_US |
dc.contributor.author | Bautista, Tomás | en_US |
dc.contributor.author | Núñez, Antonio | en_US |
dc.contributor.author | Guerra, Cayetano | en_US |
dc.contributor.author | Hernández, Mario | en_US |
dc.date.accessioned | 2018-11-24T05:57:41Z | - |
dc.date.available | 2018-11-24T05:57:41Z | - |
dc.date.issued | 2009 | en_US |
dc.identifier.issn | 0277-786X | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/49291 | - |
dc.description.abstract | In this paper, we present the modelling of a real-time tracking system on a Multi-Processor System on Chip (MPSoC). Our final goal is to build a more complex computer vision system (CVS) by integrating several applications in a modular way, which performs different kind of data processing issues but sharing a common platform, and this way, a solution for a set of applications using the same architecture is offered and not just for one application. In our current work, a visual tracking system with real-time behaviour (25 frames/sec) is used like a reference application, and also, guidelines for our future CVS applications development. Our algorithm written in C++ is based on correlation technique and the threshold dynamic update approach. After an initial computational complexity analysis, a task-graph was generated from this tracking algorithm. Concurrently with this functionality correctness analysis, a generic model of multi-processor platform was developed. Finally, the tracking system performance mapped onto the proposed architecture and shared resource usage were analyzed to determine the real architecture capacity, and also to find out possible bottlenecks in order to propose new solutions which allow more applications to be mapped on the platform template in the future. | en_US |
dc.language | eng | en_US |
dc.publisher | 0277-786X | en_US |
dc.relation.ispartof | Proceedings of SPIE - The International Society for Optical Engineering | en_US |
dc.source | Proceedings of SPIE - The International Society for Optical Engineering [ISSN 0277-786X], v. 7244 (72440G) | en_US |
dc.subject | 120304 Inteligencia artificial | en_US |
dc.subject.other | MPSoC | en_US |
dc.subject.other | Real-time visual tracking | en_US |
dc.subject.other | Platform based design | en_US |
dc.subject.other | Multi-applications performance analysis | en_US |
dc.title | Real-time visual tracking system modelling in MPSoC using platform based design | en_US |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dc.type | ConferenceObject | es |
dc.relation.conference | Real-Time Image and Video Processing 2009 | |
dc.identifier.doi | 10.1117/12.811332 | |
dc.identifier.scopus | 62549124130 | - |
dc.contributor.authorscopusid | 55434973300 | |
dc.contributor.authorscopusid | 26647484900 | - |
dc.contributor.authorscopusid | 6603190709 | - |
dc.contributor.authorscopusid | 7103279517 | - |
dc.contributor.authorscopusid | 8944017700 | - |
dc.contributor.authorscopusid | 7401972145 | - |
dc.contributor.authorscopusid | 57212239402 | |
dc.identifier.issue | 72440G | - |
dc.relation.volume | 7244 | - |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Actas de congresos | en_US |
dc.utils.revision | Sí | en_US |
dc.date.coverdate | Marzo 2009 | |
dc.identifier.conferenceid | events121362 | |
dc.identifier.ulpgc | Sí | es |
item.grantfulltext | open | - |
item.fulltext | Con texto completo | - |
crisitem.event.eventsstartdate | 19-11-2009 | - |
crisitem.event.eventsenddate | 20-11-2009 | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Sistemas de Información y Comunicaciones | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR SIANI: Inteligencia Artificial, Redes Neuronales, Aprendizaje Automático e Ingeniería de Datos | - |
crisitem.author.dept | IU Sistemas Inteligentes y Aplicaciones Numéricas | - |
crisitem.author.dept | Departamento de Informática y Sistemas | - |
crisitem.author.dept | GIR SIANI: Inteligencia Artificial, Redes Neuronales, Aprendizaje Automático e Ingeniería de Datos | - |
crisitem.author.dept | IU Sistemas Inteligentes y Aplicaciones Numéricas | - |
crisitem.author.dept | Departamento de Informática y Sistemas | - |
crisitem.author.orcid | 0000-0002-5368-3680 | - |
crisitem.author.orcid | 0000-0003-1295-1594 | - |
crisitem.author.orcid | 0000-0003-1381-2262 | - |
crisitem.author.orcid | 0000-0001-9717-8048 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU Sistemas Inteligentes y Aplicaciones Numéricas | - |
crisitem.author.parentorg | IU Sistemas Inteligentes y Aplicaciones Numéricas | - |
crisitem.author.fullName | Bautista Delgado, Tomás | - |
crisitem.author.fullName | Núñez Ordóñez, Antonio | - |
crisitem.author.fullName | Guerra Artal, Cayetano | - |
crisitem.author.fullName | Hernández Tejera, Francisco Mario | - |
Appears in Collections: | Actas de congresos |
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