Please use this identifier to cite or link to this item:
Title: Real-time application to multiprocessor-system-on-chip mapping strategy for system-level design tool
Authors: Jia, Z. J.
Bautista, T. 
Núñez, A. 
UNESCO Clasification: 3307 Tecnología electrónica
Keywords: embedded systems
logic design
microprocessor chips
resource allocation
Issue Date: 2009
Publisher: 0013-5194
Journal: Electronics letters 
Abstract: A new static mapping technique is presented that can be integrated in a system-level design tool for modelling and simulating real-time applications onto an embedded multiprocessor system. The results of preliminary experiments indicate that the proposed two-phase mapping approach can achieve a good trade-off between the efficiency in resource usage and processor load balancing, as well as the minimisation of the inter-processor communication cost.
ISSN: 0013-5194
DOI: 10.1049/el.2009.0952
Source: Electronics Letters[ISSN 0013-5194],v. 45, p. 613-615
Appears in Collections:Artículos
Show full item record

Google ScholarTM




Export metadata

Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.