Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/49288
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jia, Zai Jian | en_US |
dc.contributor.author | Bautista, Tomás | en_US |
dc.contributor.author | NúñEZ, Antonio | en_US |
dc.contributor.author | Pimentel, Andy D. | en_US |
dc.contributor.author | Thompson, Mark | en_US |
dc.contributor.other | Bautista, Tomas | - |
dc.date.accessioned | 2018-11-24T05:56:06Z | - |
dc.date.available | 2018-11-24T05:56:06Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.issn | 1539-9087 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/49288 | - |
dc.description.abstract | In this article, we present a flexible and extensible system-level MP-SoC design space exploration (DSE) infrastructure, called NASA. This highly modular framework uses well-defined interfaces to easily integrate different system-level simulation tools as well as different combinations of search strategies in a simple plug-and-play fashion. Moreover, NASA deploys a so-called dimension-oriented DSE approach, allowing designers to configure the appropriate number of, well-tuned and possibly different, search algorithms to simultaneously co-explore the various design space dimensions. As a result, NASA provides a flexible and reusable framework for the systematic exploration of the multidimensional MP-SoC design space, starting from a set of relatively simple user specifications. To demonstrate the capabilities of the NASA framework and to illustrate its distinct aspects, we also present several DSE experiments in which, for example, we compare NASA configurations using a single search algorithm for all design space dimensions to configurations using a separate search algorithm per dimension. These proof-of-concept experiments indicate that the latter multidimensional co-exploration can find better design points and evaluates a higher diversity of design alternatives as compared to the more traditional approach of using a single search algorithm for all dimensions. | en_US |
dc.language | eng | en_US |
dc.relation.ispartof | Transactions on Embedded Computing Systems | en_US |
dc.source | Transactions on Embedded Computing Systems[ISSN 1539-9087],v. 13 (27) | en_US |
dc.subject | 3307 Tecnología electrónica | en_US |
dc.subject.other | System-level design | en_US |
dc.subject.other | MP-SoC design | en_US |
dc.subject.other | System-level design space exploration | en_US |
dc.title | A system-level infrastructure for multidimensional mp-soc design space co-exploration | en_US |
dc.type | info:eu-repo/semantics/conferenceObject | en_US |
dc.type | ConferenceObject | en_US |
dc.identifier.doi | 10.1145/2536747.2536749 | en_US |
dc.identifier.scopus | 84890761042 | - |
dc.identifier.isi | 000329135500002 | - |
dcterms.isPartOf | Acm Transactions On Embedded Computing Systems | - |
dcterms.source | Acm Transactions On Embedded Computing Systems[ISSN 1539-9087],v. 13 | - |
dc.contributor.authorscopusid | 55434973300 | - |
dc.contributor.authorscopusid | 6603190709 | - |
dc.contributor.authorscopusid | 7103279517 | - |
dc.contributor.authorscopusid | 7003566212 | - |
dc.contributor.authorscopusid | 7404621450 | - |
dc.identifier.issue | 27 | - |
dc.relation.volume | 13 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Actas de congresos | en_US |
dc.identifier.wos | WOS:000329135500002 | - |
dc.contributor.daisngid | 10393233 | - |
dc.contributor.daisngid | 2227678 | - |
dc.contributor.daisngid | 33795 | - |
dc.contributor.daisngid | 506681 | - |
dc.contributor.daisngid | 2773644 | - |
dc.identifier.investigatorRID | A-9082-2011 | - |
dc.utils.revision | Sí | en_US |
dc.contributor.wosstandard | WOS:Jia, ZJ | - |
dc.contributor.wosstandard | WOS:Bautista, T | - |
dc.contributor.wosstandard | WOS:Nunez, A | - |
dc.contributor.wosstandard | WOS:Pimentel, AD | - |
dc.contributor.wosstandard | WOS:Thompson, M | - |
dc.date.coverdate | Noviembre 2013 | en_US |
dc.identifier.ulpgc | Sí | es |
dc.description.sjr | 0,31 | |
dc.description.jcr | 0,68 | |
dc.description.sjrq | Q3 | |
dc.description.jcrq | Q3 | |
dc.description.scie | SCIE | |
item.grantfulltext | open | - |
item.fulltext | Con texto completo | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Sistemas de Información y Comunicaciones | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0002-5368-3680 | - |
crisitem.author.orcid | 0000-0003-1295-1594 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Bautista Delgado, Tomás | - |
crisitem.author.fullName | Núñez Ordóñez, Antonio | - |
Appears in Collections: | Actas de congresos |
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