Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/48907
Título: Some experiences using system-on-chip buses
Autores/as: Carballo, Pedro P. 
Santos, Pablo
Marrero Martín, Margarita 
Núñez, Antonio 
Clasificación UNESCO: 3307 Tecnología electrónica
Palabras clave: System-on-a-chip
Clocks
Bridges
Data modeling
Virtual colonoscopy, et al.
Fecha de publicación: 2003
Publicación seriada: Proceedings of SPIE - The International Society for Optical Engineering 
Conferencia: Conference on VLSI Circuits and Systems 
Resumen: Advances in fabrication and design technologies have contributed to integrate a complete system on a chip. A system-on-chip (SoC) is generally composed of a microprocessor core, on-clip memory and one or more specific coprocessors IPs. One of the major drawbacks of this approach is the differences in the interfaces that each virtual component (VC) of the SoC presents. The idea of a common bus infrastructure allows us to smooth the system integration and has been considered as a design solution for SoC architectures. This paper presents a review of different alternatives for SoC buses and summarizes some experiences of their use.
URI: http://hdl.handle.net/10553/48907
ISBN: 0-8194-4977-6
ISSN: 0277-786X
DOI: 10.1117/12.501356
Fuente: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 329-340
Colección:Actas de congresos
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