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https://accedacris.ulpgc.es/handle/10553/48906
Title: | CASSE: A system-level modeling and design-space exploration tool for multiprocessor systems-on-chip |
Authors: | Reyes, Victor Bautista, Tomás Marrero, Gustavo Carballo, Pedro P. Kruijtzer, Wido |
UNESCO Clasification: | 3307 Tecnología electrónica |
Keywords: | System-on-a-chip transaction-level modeling Video coding |
Issue Date: | 2004 |
Journal: | Proceedings of the EUROMICRO Systems on Digital System Design, DSD 2004 |
Conference: | EUROMICRO Systems on Digital System Design |
Abstract: | As SoC complexity grows new methodologies and tools for system design and time-effective design space exploration are required. In this paper we introduce a tool called CASSE, what stands for CAmellia System-on-chip Simulation Environment. CASSE is a fast, flexible, and modular SystemC-based simulation environment which aims to be useful for design-space exploration and system level design at different abstraction levels. The tool uses transaction-level modeling techniques for fast simulations and easy architectural modeling, and bridge the gap to system implementation by a progressive refinement approach.CASSE is being used in the European IST-2001-34410 CAMELLIA project, which focuses on the mapping of innovative smart imaging applications onto an existing video encoding architecture. |
URI: | https://accedacris.ulpgc.es/handle/10553/48906 |
ISBN: | 0-7695-2203-3 |
DOI: | 10.1109/DSD.2004.1333313 |
Source: | Proceedings of the EUROMICRO Systems on Digital System Design, DSD 2004, p. 476-483 |
Appears in Collections: | Conference proceedings |
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