|Title:||Programmable SoC platform for deep packet inspection using enhanced Boyer-Moore algorithm||Authors:||Dominguez, Adrian
Carballo, Pedro P.
|UNESCO Clasification:||3307 Tecnología electrónica||Keywords:||Programmable Soc
Deep Packet Inspection
Platform Based Design
Systemc, et al
|Issue Date:||2017||Journal:||12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip, ReCoSoC 2017 - Proceedings||Conference:||12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)||Abstract:||This paper describes the work done to design a SoC platform for real-time on-line pattern search in TCP packets for Deep Packet Inspection (DPI) applications. The platform is based on a Xilinx Zynq programmable SoC and includes an accelerator that implements a pattern search engine that extends the original Boyer-Moore algorithm with timing and logical rules, that produces a very complex set of rules. Also, the platform implements different modes of operation, including SIMD and MISD parallelism, which can be configured on-line. The platform is scalable depending of the analysis requirement up to 8 Gbps. High-Level synthesis and platform based design methodologies have been used to reduce the time to market of the completed system.||URI:||http://hdl.handle.net/10553/48900||ISBN:||9781538633441||DOI:||10.1109/ReCoSoC.2017.8016159||Source:||12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip, ReCoSoC 2017 - Proceedings (8016159)|
|Appears in Collections:||Actas de congresos|
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