Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/47618
Title: An empirical model to estimate power consumption in GaAs DCFL/SDCFL circuits
Authors: Hernández Ballester, Antonio 
Gómez, L. 
Nunez, A. 
UNESCO Clasification: 3307 Tecnología electrónica
Keywords: VLSI Power Estimation
CAD
GaAs DCFL/SDCFL
Optimization
Issue Date: 1993
Journal: Microprocessing and Microprogramming 
Conference: 18Th Euromicro Conf - Software And Hardware : Specification And Design ( Euromicro 92 ) 
Abstract: Power dissipation is a conflicting criterium for designing high performance VLSI GaAs circuits. This paper describes a power formulation to estimate the consumption in SDCFL/DCFL circuits. It uses polynomial expressions in order to fit the power values measured with HSPICE. Besides these expressions are suitable for incorporation into an optimization strategy. The agreement with measured results is excellent, with error less than 10% over the tested cases.
URI: http://hdl.handle.net/10553/47618
ISSN: 0165-6074
DOI: 10.1016/0165-6074(93)90008-9
Source: Microprocessing and Microprogramming [ISSN 0165-6074], v. 37 (1-5), p. 23-26
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