Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/46939
DC FieldValueLanguage
dc.contributor.authorGonzález, Benitoen_US
dc.contributor.authorHernández, Antonioen_US
dc.contributor.authorGarcía, Javieren_US
dc.contributor.authorNunez, Antonioen_US
dc.date.accessioned2018-11-23T09:34:11Z-
dc.date.available2018-11-23T09:34:11Z-
dc.date.issued1997en_US
dc.identifier.urihttp://hdl.handle.net/10553/46939-
dc.description.abstractRecently the use of δ-dopnig in HFET processes has made possible the development of transistor circuits and logics for very high frequency/speed or ultra low power applications, that rely on fast quantum well conduction. In these cases the effect of the target operating temperature range is critical. This range depends on the transistor and circuit activity, the packaging technique, and the specified external operating conditions. The temperature strongly affects the device ability to confine the current flow to the quantum well channel. In this paper the effect of temperature and δ-doping concentration on the performance of the device is investigated by means of simulated experiments. The results are analytically and qualitatively discussed showing how to fine-tune the δ-doping concentration for different temperature conditions in order to optimize the P-HFET behaviour.en_US
dc.languageengen_US
dc.relation.ispartofInternational Symposium on IC Technology, Systems and Applicationsen_US
dc.sourceInternational Symposium on IC Technology, Systems and Applications,v. 7, p. 394-397en_US
dc.subject3307 Tecnología electrónicaen_US
dc.titleInfluence of temperature and δ-doped layer concentration on P-HFETsen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conference7th International Symposium on IC Technology, Systems and Applications ISIC 97en_US
dc.identifier.scopus1842729407-
dc.contributor.authorscopusid56082155300-
dc.contributor.authorscopusid57194681887-
dc.contributor.authorscopusid8383160900-
dc.contributor.authorscopusid7103279517-
dc.description.lastpage397en_US
dc.description.firstpage394en_US
dc.relation.volume7en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.utils.revisionen_US
dc.date.coverdateDiciembre 1997en_US
dc.identifier.conferenceidevents121277-
dc.identifier.ulpgces
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.event.eventsstartdate10-09-1997-
crisitem.event.eventsenddate12-09-1997-
crisitem.author.deptGIR IUMA: Tecnología Microelectrónica-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0001-6864-9736-
crisitem.author.orcid0000-0003-3561-0135-
crisitem.author.orcid0000-0003-1295-1594-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameGonzález Pérez, Benito-
crisitem.author.fullNameGarcía García, Javier Agustín-
crisitem.author.fullNameNúñez Ordóñez, Antonio-
Appears in Collections:Actas de congresos
Show simple item record

SCOPUSTM   
Citations

1
checked on Oct 13, 2024

Page view(s)

31
checked on Oct 28, 2023

Google ScholarTM

Check


Share



Export metadata



Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.