Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/46937
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dc.contributor.authorAbbott, D.en_US
dc.contributor.authorAl-Sarawi, S. F.en_US
dc.contributor.authorGonzalez, B.en_US
dc.contributor.authorLopez, J.en_US
dc.contributor.authorAustin-Crowe, J.en_US
dc.contributor.authorEshraghian, K.en_US
dc.date.accessioned2018-11-23T09:33:16Z-
dc.date.available2018-11-23T09:33:16Z-
dc.date.issued1998en_US
dc.identifier.urihttp://hdl.handle.net/10553/46937-
dc.description.abstractThe neu-MOS (vMOS) transistor is a new device that enables the design of conventional digital and analog circuits, in standard CMOS, with a factor of 5-10 decrease gate count. Furthermore, vMOS circuit characteristics are insensitive to transistor parameter variations but instead rely on coupling capacitor ratios. In this paper, we demonstrate this principle with results from fabricated controlled gain amplifiers. This new technology is ideal for smart sensors where a high functionality per pixel area and good matching between pixels is required. Moreover, we discuss the advantages of smart sensors in GaAs technology and the viability of developing a vGaAs paradigm.en_US
dc.languageengen_US
dc.relation.ispartofProceedings of the IEEE International Conference on Electronics, Circuits, and Systemsen_US
dc.sourceProceedings of the IEEE International Conference on Electronics, Circuits, and Systems,v. 3, p. 397-404en_US
dc.subject3307 Tecnología electrónicaen_US
dc.titleNeu-MOS (νMOS) for smart sensors and extension to a novel neu-GaAs (νGaAs) paradigmen_US
dc.typeinfo:eu-repo/semantics/articleen_US
dc.typeArticleen_US
dc.identifier.scopus0032275948-
dc.contributor.authorscopusid56053895400-
dc.contributor.authorscopusid7004170747-
dc.contributor.authorscopusid56082155300-
dc.contributor.authorscopusid7404444793-
dc.contributor.authorscopusid6504651407-
dc.contributor.authorscopusid7007041524-
dc.description.lastpage404en_US
dc.description.firstpage397en_US
dc.relation.volume3en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Artículoen_US
dc.utils.revisionen_US
dc.identifier.ulpgces
item.grantfulltextopen-
item.fulltextCon texto completo-
crisitem.author.deptGIR IUMA: Tecnología Microelectrónica-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0001-6864-9736-
crisitem.author.orcid0000-0002-6304-2801-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameGonzález Pérez, Benito-
crisitem.author.fullNameLópez Feliciano, José Francisco-
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