Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/46809
Campo DC Valoridioma
dc.contributor.authorMadronal, D.en_US
dc.contributor.authorLazcano, R.en_US
dc.contributor.authorFabelo, H.en_US
dc.contributor.authorOrtega, S.en_US
dc.contributor.authorSalvador, R.en_US
dc.contributor.authorCallico, G. M.en_US
dc.contributor.authorJuarez, E.en_US
dc.contributor.authorSanz, C.en_US
dc.date.accessioned2018-11-23T08:26:08Z-
dc.date.available2018-11-23T08:26:08Z-
dc.date.issued2017en_US
dc.identifier.isbn9781538635346en_US
dc.identifier.issn2164-9766en_US
dc.identifier.otherWoS-
dc.identifier.urihttp://hdl.handle.net/10553/46809-
dc.description.abstractIn this paper, a Massively Parallel Processor Array platform is characterized in terms of energy consumption using a Support Vector Machine for hyperspectral image classification. This platform gathers 16 clusters composed of 16 cores each, i.e., 256 processors working in parallel. The objective of the work is to associate power dissipation and energy consumed by the platform with the different resources of the architecture. Experimenting with a hyperspectral SVM classifier, this study has been conducted using three strategies: i) modifying the number of processing elements, i.e., clusters and cores, ii) increasing system frequency, and iii) varying the number of active communication links during the analysis, i.e., I/Os and DMAs. As a result, a relationship between the energy consumption and the active platform resources has been exposed using two different parallelization strategies. Finally, the implementation that fully exploits the parallelization possibilities working at 500MHz has been proven to be also the most efficient one, as it reduces the energy consumption by 98% when compared to the sequential version running at 400MHz.en_US
dc.languageengen_US
dc.relation.ispartof2017 Conference On Design And Architectures For Signal And Image Processing (Dasip)en_US
dc.sourceConference on Design and Architectures for Signal and Image Processing, DASIP[ISSN 2164-9766],v. 2017-September, p. 1-6en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherHyperspectral imagingen_US
dc.subject.otherParallel processingen_US
dc.subject.otherSupport vector machinesen_US
dc.subject.otherEnergy consumptionen_US
dc.subject.otherPowe dissipationen_US
dc.subject.otherPower measurementen_US
dc.titleEnergy consumption characterization of a Massively Parallel Processor Array (MPPA) platform running a hyperspectral SVM classifieren_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conference2017 Conference on Design and Architectures for Signal and Image Processing, DASIP 2017en_US
dc.identifier.doi10.1109/DASIP.2017.8122112en_US
dc.identifier.scopus85041549514-
dc.identifier.isi000426986300006-
dc.contributor.authorscopusid57192829417-
dc.contributor.authorscopusid57192839213-
dc.contributor.authorscopusid56405568500-
dc.contributor.authorscopusid57189334144-
dc.contributor.authorscopusid23005852100-
dc.contributor.authorscopusid56006321500-
dc.contributor.authorscopusid36447485600-
dc.contributor.authorscopusid7006751614-
dc.description.lastpage6en_US
dc.description.firstpage1en_US
dc.relation.volume2017-Septemberen_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.contributor.daisngid3360488-
dc.contributor.daisngid3634522-
dc.contributor.daisngid2096372-
dc.contributor.daisngid1812298-
dc.contributor.daisngid1888017-
dc.contributor.daisngid506422-
dc.contributor.daisngid693458-
dc.contributor.daisngid384271-
dc.description.numberofpages6en_US
dc.identifier.eisbn978-1-5386-3534-6-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Madronal, D-
dc.contributor.wosstandardWOS:Lazcano, R-
dc.contributor.wosstandardWOS:Fabelo, H-
dc.contributor.wosstandardWOS:Ortega, S-
dc.contributor.wosstandardWOS:Salvador, R-
dc.contributor.wosstandardWOS:Callico, GM-
dc.contributor.wosstandardWOS:Juarez, E-
dc.contributor.wosstandardWOS:Sanz, C-
dc.date.coverdateNoviembre 2017en_US
dc.identifier.conferenceidevents121092-
dc.identifier.ulpgces
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.event.eventsstartdate27-09-2017-
crisitem.event.eventsenddate29-09-2017-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-9794-490X-
crisitem.author.orcid0000-0002-7519-954X-
crisitem.author.orcid0000-0002-3784-5504-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameFabelo Gómez, Himar Antonio-
crisitem.author.fullNameOrtega Sarmiento,Samuel-
crisitem.author.fullNameMarrero Callicó, Gustavo Iván-
Colección:Actas de congresos
Vista resumida

Google ScholarTM

Verifica

Altmetric


Comparte



Exporta metadatos



Los elementos en ULPGC accedaCRIS están protegidos por derechos de autor con todos los derechos reservados, a menos que se indique lo contrario.