Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/45092
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | López Feliciano, José | en_US |
| dc.contributor.author | Eshraghian, K. | en_US |
| dc.contributor.author | Sarmiento, R. | en_US |
| dc.contributor.author | Núñez, A. | en_US |
| dc.contributor.other | Lopez, Jose | - |
| dc.contributor.other | Sarmiento, Roberto | - |
| dc.date.accessioned | 2018-11-22T07:12:27Z | - |
| dc.date.available | 2018-11-22T07:12:27Z | - |
| dc.date.issued | 1996 | en_US |
| dc.identifier.issn | 0013-5194 | en_US |
| dc.identifier.uri | http://hdl.handle.net/10553/45092 | - |
| dc.description.abstract | A new GaAs logic family, pseudo-dynamic latched logic (PDLL). is introduced. Compared with traditional static GaAs logic families, PDLL allows complex gate design with less power dissipation. In addition, it overcomes problems associated with charge degradation in the storage nodes in dynamic logic gates, and operates at relatively high temperatures. PDLL is self-latched which leads to the possibility of implementing compact pipeline systems. | en_US |
| dc.language | eng | en_US |
| dc.publisher | 0013-5194 | |
| dc.relation.ispartof | Electronics letters | en_US |
| dc.source | Electronics Letters[ISSN 0013-5194],v. 32, p. 1353-1354 | en_US |
| dc.subject | 3307 Tecnología electrónica | en_US |
| dc.subject.other | Gallium compounds | en_US |
| dc.subject.other | Pipeline processing | en_US |
| dc.subject.other | Integrated circuit design | en_US |
| dc.subject.other | Integrated circuit noise | en_US |
| dc.subject.other | FET logic devices | en_US |
| dc.title | Gallium arsenide pseudo-dynamic latched logic | en_US |
| dc.type | info:eu-repo/semantics/Article | en_US |
| dc.type | Article | en_US |
| dc.identifier.doi | 10.1049/el:19960926 | en_US |
| dc.identifier.scopus | 3042974300 | - |
| dc.identifier.isi | A1996VA51300019 | - |
| dcterms.isPartOf | Electronics Letters | |
| dcterms.source | Electronics Letters[ISSN 0013-5194],v. 32 (15), p. 1353-1354 | |
| dc.contributor.authorscopusid | 7404444793 | - |
| dc.contributor.authorscopusid | 7007041524 | - |
| dc.contributor.authorscopusid | 35609452100 | - |
| dc.contributor.authorscopusid | 7103279517 | - |
| dc.description.lastpage | 1354 | en_US |
| dc.description.firstpage | 1353 | en_US |
| dc.relation.volume | 32 | en_US |
| dc.investigacion | Ingeniería y Arquitectura | en_US |
| dc.type2 | Artículo | en_US |
| dc.identifier.wos | WOS:A1996VA51300019 | - |
| dc.contributor.daisngid | 846472 | - |
| dc.contributor.daisngid | 228382 | - |
| dc.contributor.daisngid | 30404478 | - |
| dc.contributor.daisngid | 116294 | - |
| dc.contributor.daisngid | 33795 | - |
| dc.identifier.investigatorRID | L-6046-2014 | - |
| dc.identifier.investigatorRID | L-6017-2014 | - |
| dc.utils.revision | Sí | en_US |
| dc.contributor.wosstandard | WOS:Lopez, JF | - |
| dc.contributor.wosstandard | WOS:Eshraghian, K | - |
| dc.contributor.wosstandard | WOS:Sarmiento, R | - |
| dc.contributor.wosstandard | WOS:Nunez, A | - |
| dc.date.coverdate | Julio 1996 | en_US |
| dc.identifier.ulpgc | Sí | en_US |
| dc.contributor.buulpgc | BU-ING | en_US |
| dc.description.scie | SCIE | |
| item.grantfulltext | none | - |
| item.fulltext | Sin texto completo | - |
| crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.dept | GIR IUMA: Sistemas de Información y Comunicaciones | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.orcid | 0000-0002-6304-2801 | - |
| crisitem.author.orcid | 0000-0002-4843-0507 | - |
| crisitem.author.orcid | 0000-0003-1295-1594 | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.fullName | López Feliciano, José Francisco | - |
| crisitem.author.fullName | Sarmiento Rodríguez, Roberto | - |
| crisitem.author.fullName | Núñez Ordóñez, Antonio | - |
| Appears in Collections: | Artículos | |
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