Please use this identifier to cite or link to this item:
https://accedacris.ulpgc.es/handle/10553/45066
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Tobajas, F. | en_US |
| dc.contributor.author | Esper-Chaín, R. | en_US |
| dc.contributor.author | De Armas Sosa, Valentín | en_US |
| dc.contributor.author | López Feliciano, José Francisco | en_US |
| dc.contributor.author | Sarmiento, R. | en_US |
| dc.date.accessioned | 2018-11-22T07:00:32Z | - |
| dc.date.available | 2018-11-22T07:00:32Z | - |
| dc.date.issued | 2003 | en_US |
| dc.identifier.issn | 0013-5194 | en_US |
| dc.identifier.uri | https://accedacris.ulpgc.es/handle/10553/45066 | - |
| dc.description.abstract | Scheduling algorithms developed for virtual-output-queuing (VOQ) switches have focused on the throughput enhancement, rather than provide QoS guarantees for different priority levels. Presented, is a new scheduling scheme to effectively support real-time and data applications in VOQ switches with negligible complexity increment. | en_US |
| dc.language | eng | en_US |
| dc.publisher | 0013-5194 | |
| dc.relation.ispartof | Electronics letters | en_US |
| dc.source | Electronics Letters[ISSN 0013-5194],v. 39, p. 580-581 | en_US |
| dc.subject | 3307 Tecnología electrónica | en_US |
| dc.subject.other | Queueing theory | en_US |
| dc.subject.other | Packet switching | en_US |
| dc.subject.other | Scheduling | en_US |
| dc.subject.other | Quality of service | en_US |
| dc.title | Cell scheduling for VOQ switches with different strict priority levels | en_US |
| dc.type | info:eu-repo/semantics/Article | en_US |
| dc.type | Article | en_US |
| dc.identifier.doi | 10.1049/el:20030334 | en_US |
| dc.identifier.scopus | 0037456960 | - |
| dc.identifier.isi | 000181941000062 | - |
| dc.contributor.authorscopusid | 6602389338 | - |
| dc.contributor.authorscopusid | 6602504574 | - |
| dc.contributor.authorscopusid | 6603181073 | - |
| dc.contributor.authorscopusid | 7404444793 | - |
| dc.contributor.authorscopusid | 35609452100 | - |
| dc.description.lastpage | 581 | en_US |
| dc.description.firstpage | 580 | en_US |
| dc.relation.volume | 39 | en_US |
| dc.investigacion | Ingeniería y Arquitectura | en_US |
| dc.type2 | Artículo | en_US |
| dc.contributor.daisngid | 26063230 | - |
| dc.contributor.daisngid | 1984698 | - |
| dc.contributor.daisngid | 13379932 | - |
| dc.contributor.daisngid | 846472 | - |
| dc.contributor.daisngid | 116294 | - |
| dc.utils.revision | Sí | en_US |
| dc.contributor.wosstandard | WOS:Tobajas, F | - |
| dc.contributor.wosstandard | WOS:Esper-Chain, R | - |
| dc.contributor.wosstandard | WOS:de Armas, V | - |
| dc.contributor.wosstandard | WOS:Lopez, JF | - |
| dc.contributor.wosstandard | WOS:Sarmiento, R | - |
| dc.date.coverdate | Marzo 2003 | en_US |
| dc.identifier.ulpgc | Sí | en_US |
| dc.contributor.buulpgc | BU-TEL | en_US |
| dc.description.sjr | 1,278 | |
| dc.description.jcr | 1,01 | |
| dc.description.sjrq | Q1 | |
| dc.description.jcrq | Q2 | |
| dc.description.scie | SCIE | |
| item.fulltext | Sin texto completo | - |
| item.grantfulltext | none | - |
| crisitem.author.dept | GIR IUMA: Sistemas de Información y Comunicaciones | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.dept | GIR IUMA: Equipos y Sistemas de Comunicación | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.dept | GIR IUMA: Sistemas de Información y Comunicaciones | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.orcid | 0000-0002-3379-5052 | - |
| crisitem.author.orcid | 0000-0002-8381-969X | - |
| crisitem.author.orcid | 0000-0002-1017-8107 | - |
| crisitem.author.orcid | 0000-0002-6304-2801 | - |
| crisitem.author.orcid | 0000-0002-4843-0507 | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.fullName | Tobajas Guerrero, Félix Bernardo | - |
| crisitem.author.fullName | Esper-Chaín Falcón, Roberto | - |
| crisitem.author.fullName | De Armas Sosa, Valentín | - |
| crisitem.author.fullName | López Feliciano, José Francisco | - |
| crisitem.author.fullName | Sarmiento Rodríguez, Roberto | - |
| Appears in Collections: | Artículos | |
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