Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45016
DC FieldValueLanguage
dc.contributor.authorHorstrand, Pabloen_US
dc.contributor.authorLopez, Sebastianen_US
dc.contributor.authorCallico, Gustavo M.en_US
dc.contributor.authorLopez, Jose F.en_US
dc.contributor.authorSarmiento, Robertoen_US
dc.date.accessioned2018-11-22T06:37:22Z-
dc.date.available2018-11-22T06:37:22Z-
dc.date.issued2011en_US
dc.identifier.issn2158-6276en_US
dc.identifier.urihttp://hdl.handle.net/10553/45016-
dc.description.abstractHyperspectral images are nowadays used in multiple fields, such as medical diagnosis, assessment of food quality, or environmental monitoring, just to name some. Due to their inherent nature, a great number of these applications require the implementation of a real time hyperspectral image processing system. However, most of the research effort so far has been concentrated on the development of mathematical algorithms to process these images, rather than in the implementation of them into a piece of hardware able to face with real time requirements. In this paper, the architectural design and hardware implementation of two hyperspectral matching algorithms (spectral angle and cross correlation) onto a Virtex-5 FPGA device are presented. In this sense, the goal of this work is not only to reduce image processing times by mapping these algorithms onto a programmable hardware platform, but also to provide a comparison between them in different terms, such as area occupation and throughput, than the ones normally used in the hyperspectral literature. The results demonstrate the achievement of speed-up factors of almost 600 times when compared with pure software implementations, as well as the higher hardware efficiency of the spectral angle with respect to the cross correlation algorithm. In addition, the benefits of adopting a pipelined architectural approach for the implementation of both algorithms are also proved, leading to a reduction in the time required for processing one hyperspectral cube of more than one order of magnitude with respect to state-of-the-art FPGA implementations.en_US
dc.languageengen_US
dc.relation.ispartofWorkshop on Hyperspectral Image and Signal Processing, Evolution in Remote Sensingen_US
dc.sourceWorkshop on Hyperspectral Image and Signal Processing, Evolution in Remote Sensing[ISSN 2158-6276] (6080921)en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherHyperspectral imagingen_US
dc.subject.otherAlgorithm design and analysisen_US
dc.subject.otherField programmable gate arraysen_US
dc.subject.otherPipelinesen_US
dc.subject.otherComputer architectureen_US
dc.titleNovel architectures for real-time matching in hyperspectral imagesen_US
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.typeConferenceObjectes
dc.relation.conference3rd Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, WHISPERS 2011
dc.identifier.doi10.1109/WHISPERS.2011.6080921
dc.identifier.scopus84255167101-
dc.contributor.authorscopusid54399861900-
dc.contributor.authorscopusid57187722000-
dc.contributor.authorscopusid56006321500-
dc.contributor.authorscopusid7404444793-
dc.contributor.authorscopusid35609452100-
dc.identifier.issue6080921-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.utils.revisionen_US
dc.date.coverdateDiciembre 2011
dc.identifier.conferenceidevents121420
dc.identifier.ulpgces
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.event.eventsstartdate06-06-2011-
crisitem.event.eventsenddate09-06-2011-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-2360-6721-
crisitem.author.orcid0000-0002-3784-5504-
crisitem.author.orcid0000-0002-6304-2801-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameLópez Suárez, Sebastián Miguel-
crisitem.author.fullNameMarrero Callicó, Gustavo Iván-
crisitem.author.fullNameLópez Feliciano, José Francisco-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
Appears in Collections:Actas de congresos
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