Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/45005
Campo DC Valoridioma
dc.contributor.authorSantos, Lucanaen_US
dc.contributor.authorMagli, Enricoen_US
dc.contributor.authorVitulli, Raffaeleen_US
dc.contributor.authorLópez, José Fcoen_US
dc.contributor.authorSarmiento, Robertoen_US
dc.contributor.otherSarmiento, Roberto-
dc.contributor.otherLopez, Jose-
dc.date.accessioned2018-11-22T06:32:19Z-
dc.date.available2018-11-22T06:32:19Z-
dc.date.issued2013en_US
dc.identifier.issn1939-1404en_US
dc.identifier.urihttp://hdl.handle.net/10553/45005-
dc.description.abstractGraphics Processing Units (GPU) are becoming a widespread tool for general-purpose scientific computing, and are attracting interest for future onboard satellite image processing payloads due to their ability to perform massively parallel computations. This paper describes the GPU implementation of an algorithm for onboard lossy hyperspectral image compression, and proposes an architecture that allows to accelerate the compression task by parallelizing it on the GPU. The selected algorithm was amenable to parallel computation owing to its block-based operation, and has been optimized here to facilitate GPU implementation incurring a negligible overhead with respect to the original single-threaded version. In particular, a parallelization strategy has been designed for both the compressor and the corresponding decompressor, which are implemented on a GPU using Nvidia's CUDA parallel architecture. Experimental results on several hyperspectral images with different spatial and spectral dimensions are presented, showing significant speed-ups with respect to a single-threaded CPU implementation. These results highlight the significant benefits of GPUs for onboard image processing, and particularly image compression, demonstrating the potential of GPUs as a future hardware platform for very high data rate instruments.en_US
dc.languageengen_US
dc.publisher1939-1404
dc.relation.ispartofIEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensingen_US
dc.sourceIEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing[ISSN 1939-1404],v. 6 (6507337), p. 670-681en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherGraphics processing unitsen_US
dc.subject.otherImage codingen_US
dc.subject.otherHyperspectral imagingen_US
dc.subject.otherPrediction algorithmsen_US
dc.subject.otherKernelen_US
dc.titleHighly-parallel gpu architecture for lossy hyperspectral image compressionen_US
dc.typeinfo:eu-repo/semantics/Articleen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/JSTARS.2013.2247975en_US
dc.identifier.scopus84877877676-
dc.identifier.isi000319278000020-
dcterms.isPartOfIeee Journal Of Selected Topics In Applied Earth Observations And Remote Sensing
dcterms.sourceIeee Journal Of Selected Topics In Applied Earth Observations And Remote Sensing[ISSN 1939-1404],v. 6 (2), p. 670-681
dc.contributor.authorscopusid54391653200-
dc.contributor.authorscopusid7003771643-
dc.contributor.authorscopusid16026007600-
dc.contributor.authorscopusid7404444793-
dc.contributor.authorscopusid35609452100-
dc.description.lastpage681en_US
dc.identifier.issue6507337-
dc.description.firstpage670en_US
dc.relation.volume6en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Artículoen_US
dc.identifier.wosWOS:000319278000020-
dc.contributor.daisngid29585558-
dc.contributor.daisngid2992395-
dc.contributor.daisngid119600-
dc.contributor.daisngid1734824-
dc.contributor.daisngid846472-
dc.contributor.daisngid116294-
dc.identifier.investigatorRIDL-6017-2014-
dc.identifier.investigatorRIDL-6046-2014-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Santos, L-
dc.contributor.wosstandardWOS:Magli, E-
dc.contributor.wosstandardWOS:Vitulli, R-
dc.contributor.wosstandardWOS:Lopez, JF-
dc.contributor.wosstandardWOS:Sarmiento, R-
dc.date.coverdateMayo 2013en_US
dc.identifier.ulpgcen_US
dc.contributor.buulpgcBU-TELen_US
dc.description.sjr1,664
dc.description.jcr2,827
dc.description.sjrqQ1
dc.description.jcrqQ1
dc.description.scieSCIE
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-6304-2801-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameSantos Falcón, Lucana-
crisitem.author.fullNameLópez Feliciano, José Francisco-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
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