Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/45005
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Santos, Lucana | en_US |
dc.contributor.author | Magli, Enrico | en_US |
dc.contributor.author | Vitulli, Raffaele | en_US |
dc.contributor.author | López, José Fco | en_US |
dc.contributor.author | Sarmiento, Roberto | en_US |
dc.contributor.other | Sarmiento, Roberto | - |
dc.contributor.other | Lopez, Jose | - |
dc.date.accessioned | 2018-11-22T06:32:19Z | - |
dc.date.available | 2018-11-22T06:32:19Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.issn | 1939-1404 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/45005 | - |
dc.description.abstract | Graphics Processing Units (GPU) are becoming a widespread tool for general-purpose scientific computing, and are attracting interest for future onboard satellite image processing payloads due to their ability to perform massively parallel computations. This paper describes the GPU implementation of an algorithm for onboard lossy hyperspectral image compression, and proposes an architecture that allows to accelerate the compression task by parallelizing it on the GPU. The selected algorithm was amenable to parallel computation owing to its block-based operation, and has been optimized here to facilitate GPU implementation incurring a negligible overhead with respect to the original single-threaded version. In particular, a parallelization strategy has been designed for both the compressor and the corresponding decompressor, which are implemented on a GPU using Nvidia's CUDA parallel architecture. Experimental results on several hyperspectral images with different spatial and spectral dimensions are presented, showing significant speed-ups with respect to a single-threaded CPU implementation. These results highlight the significant benefits of GPUs for onboard image processing, and particularly image compression, demonstrating the potential of GPUs as a future hardware platform for very high data rate instruments. | en_US |
dc.language | eng | en_US |
dc.publisher | 1939-1404 | |
dc.relation.ispartof | IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing | en_US |
dc.source | IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing[ISSN 1939-1404],v. 6 (6507337), p. 670-681 | en_US |
dc.subject | 3307 Tecnología electrónica | en_US |
dc.subject.other | Graphics processing units | en_US |
dc.subject.other | Image coding | en_US |
dc.subject.other | Hyperspectral imaging | en_US |
dc.subject.other | Prediction algorithms | en_US |
dc.subject.other | Kernel | en_US |
dc.title | Highly-parallel gpu architecture for lossy hyperspectral image compression | en_US |
dc.type | info:eu-repo/semantics/Article | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/JSTARS.2013.2247975 | en_US |
dc.identifier.scopus | 84877877676 | - |
dc.identifier.isi | 000319278000020 | - |
dcterms.isPartOf | Ieee Journal Of Selected Topics In Applied Earth Observations And Remote Sensing | |
dcterms.source | Ieee Journal Of Selected Topics In Applied Earth Observations And Remote Sensing[ISSN 1939-1404],v. 6 (2), p. 670-681 | |
dc.contributor.authorscopusid | 54391653200 | - |
dc.contributor.authorscopusid | 7003771643 | - |
dc.contributor.authorscopusid | 16026007600 | - |
dc.contributor.authorscopusid | 7404444793 | - |
dc.contributor.authorscopusid | 35609452100 | - |
dc.description.lastpage | 681 | en_US |
dc.identifier.issue | 6507337 | - |
dc.description.firstpage | 670 | en_US |
dc.relation.volume | 6 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Artículo | en_US |
dc.identifier.wos | WOS:000319278000020 | - |
dc.contributor.daisngid | 29585558 | - |
dc.contributor.daisngid | 2992395 | - |
dc.contributor.daisngid | 119600 | - |
dc.contributor.daisngid | 1734824 | - |
dc.contributor.daisngid | 846472 | - |
dc.contributor.daisngid | 116294 | - |
dc.identifier.investigatorRID | L-6017-2014 | - |
dc.identifier.investigatorRID | L-6046-2014 | - |
dc.utils.revision | Sí | en_US |
dc.contributor.wosstandard | WOS:Santos, L | - |
dc.contributor.wosstandard | WOS:Magli, E | - |
dc.contributor.wosstandard | WOS:Vitulli, R | - |
dc.contributor.wosstandard | WOS:Lopez, JF | - |
dc.contributor.wosstandard | WOS:Sarmiento, R | - |
dc.date.coverdate | Mayo 2013 | en_US |
dc.identifier.ulpgc | Sí | en_US |
dc.contributor.buulpgc | BU-TEL | en_US |
dc.description.sjr | 1,664 | |
dc.description.jcr | 2,827 | |
dc.description.sjrq | Q1 | |
dc.description.jcrq | Q1 | |
dc.description.scie | SCIE | |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0002-6304-2801 | - |
crisitem.author.orcid | 0000-0002-4843-0507 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Santos Falcón, Lucana | - |
crisitem.author.fullName | López Feliciano, José Francisco | - |
crisitem.author.fullName | Sarmiento Rodríguez, Roberto | - |
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