Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/45002
DC Field | Value | Language |
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dc.contributor.author | Santos, Lucana | - |
dc.contributor.author | Magli, Enrico | - |
dc.contributor.author | Vitulli, Raffaele | - |
dc.contributor.author | Núñez, Antonio | - |
dc.contributor.author | López, José F. | - |
dc.contributor.author | Sarmiento, Roberto | - |
dc.date.accessioned | 2018-11-22T06:30:57Z | - |
dc.date.available | 2018-11-22T06:30:57Z | - |
dc.date.issued | 2013 | - |
dc.identifier.issn | 1931-3195 | - |
dc.identifier.other | WoS | - |
dc.identifier.uri | http://hdl.handle.net/10553/45002 | - |
dc.description.abstract | There is an intense necessity for the development of new hardware architectures for the implementation of algorithms for hyperspectral image compression on board satellites. Graphics processing units (GPUs) represent a very attractive opportunity, offering the possibility to dramatically increase the computation speed in applications that are data and task parallel. An algorithm for the lossy compression of hyperspectral images is implemented on a GPU using Nvidia computer unified device architecture (CUDA) parallel computing architecture. The parallelization strategy is explained, with emphasis on the entropy coding and bit packing phases, for which a more sophisticated strategy is necessary due to the existing data dependencies. Experimental results are obtained by comparing the performance of the GPU implementation with a single-threaded CPU implementation, showing high speedups of up to 15.41. A profiling of the algorithm is provided, demonstrating the high performance of the designed parallel entropy coding phase. The accuracy of the GPU implementation is presented, as well as the effect of the configuration parameters on performance. The convenience of using GPUs for on-board processing is demonstrated, and solutions to the potential difficulties encountered when accelerating hyperspectral compression algorithms are proposed, if space-qualified GPUs become a reality in the near future. | - |
dc.language | eng | - |
dc.relation.ispartof | Journal of Applied Remote Sensing | - |
dc.source | Journal of Applied Remote Sensing,v. 7 (12485SS) | - |
dc.subject | 3307 Tecnología electrónica | - |
dc.subject.other | Image compression | - |
dc.subject.other | Image coding | - |
dc.subject.other | SPIHT algorithm | - |
dc.title | Lossy hyperspectral image compression on a graphics processing unit: parallelization strategy and performance evaluation | - |
dc.type | info:eu-repo/semantics/Article | - |
dc.type | Article | - |
dc.identifier.doi | 10.1117/1.JRS.7.074599 | - |
dc.identifier.scopus | 84887451269 | - |
dc.identifier.isi | 000322617200001 | - |
dc.contributor.authorscopusid | 54391653200 | - |
dc.contributor.authorscopusid | 7003771643 | - |
dc.contributor.authorscopusid | 16026007600 | - |
dc.contributor.authorscopusid | 7103279517 | - |
dc.contributor.authorscopusid | 7404444793 | - |
dc.contributor.authorscopusid | 35609452100 | - |
dc.identifier.issue | 12485SS | - |
dc.relation.volume | 7 | - |
dc.investigacion | Ingeniería y Arquitectura | - |
dc.type2 | Artículo | - |
dc.contributor.daisngid | 29585558 | - |
dc.contributor.daisngid | 119600 | - |
dc.contributor.daisngid | 1734824 | - |
dc.contributor.daisngid | 33795 | - |
dc.contributor.daisngid | 846472 | - |
dc.contributor.daisngid | 116294 | - |
dc.description.numberofpages | 15 | - |
dc.utils.revision | Sí | - |
dc.contributor.wosstandard | WOS:Santos, L | - |
dc.contributor.wosstandard | WOS:Magli, E | - |
dc.contributor.wosstandard | WOS:Vitulli, R | - |
dc.contributor.wosstandard | WOS:Nunez, A | - |
dc.contributor.wosstandard | WOS:Lopez, JF | - |
dc.contributor.wosstandard | WOS:Sarmiento, R | - |
dc.date.coverdate | Noviembre 2013 | - |
dc.identifier.ulpgc | Sí | es |
dc.description.sjr | 0,448 | |
dc.description.jcr | 0,892 | |
dc.description.sjrq | Q2 | |
dc.description.jcrq | Q3 | |
dc.description.scie | SCIE | |
item.grantfulltext | open | - |
item.fulltext | Con texto completo | - |
crisitem.author.dept | GIR IUMA: Sistemas de Información y Comunicaciones | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0003-1295-1594 | - |
crisitem.author.orcid | 0000-0002-6304-2801 | - |
crisitem.author.orcid | 0000-0002-4843-0507 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Santos Falcón, Lucana | - |
crisitem.author.fullName | Núñez Ordóñez, Antonio | - |
crisitem.author.fullName | López Feliciano, José Francisco | - |
crisitem.author.fullName | Sarmiento Rodríguez, Roberto | - |
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