Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45002
DC FieldValueLanguage
dc.contributor.authorSantos, Lucana-
dc.contributor.authorMagli, Enrico-
dc.contributor.authorVitulli, Raffaele-
dc.contributor.authorNúñez, Antonio-
dc.contributor.authorLópez, José F.-
dc.contributor.authorSarmiento, Roberto-
dc.date.accessioned2018-11-22T06:30:57Z-
dc.date.available2018-11-22T06:30:57Z-
dc.date.issued2013-
dc.identifier.issn1931-3195-
dc.identifier.otherWoS-
dc.identifier.urihttp://hdl.handle.net/10553/45002-
dc.description.abstractThere is an intense necessity for the development of new hardware architectures for the implementation of algorithms for hyperspectral image compression on board satellites. Graphics processing units (GPUs) represent a very attractive opportunity, offering the possibility to dramatically increase the computation speed in applications that are data and task parallel. An algorithm for the lossy compression of hyperspectral images is implemented on a GPU using Nvidia computer unified device architecture (CUDA) parallel computing architecture. The parallelization strategy is explained, with emphasis on the entropy coding and bit packing phases, for which a more sophisticated strategy is necessary due to the existing data dependencies. Experimental results are obtained by comparing the performance of the GPU implementation with a single-threaded CPU implementation, showing high speedups of up to 15.41. A profiling of the algorithm is provided, demonstrating the high performance of the designed parallel entropy coding phase. The accuracy of the GPU implementation is presented, as well as the effect of the configuration parameters on performance. The convenience of using GPUs for on-board processing is demonstrated, and solutions to the potential difficulties encountered when accelerating hyperspectral compression algorithms are proposed, if space-qualified GPUs become a reality in the near future.-
dc.languageeng-
dc.relation.ispartofJournal of Applied Remote Sensing-
dc.sourceJournal of Applied Remote Sensing,v. 7 (12485SS)-
dc.subject3307 Tecnología electrónica-
dc.subject.otherImage compression-
dc.subject.otherImage coding-
dc.subject.otherSPIHT algorithm-
dc.titleLossy hyperspectral image compression on a graphics processing unit: parallelization strategy and performance evaluation-
dc.typeinfo:eu-repo/semantics/Article-
dc.typeArticle-
dc.identifier.doi10.1117/1.JRS.7.074599-
dc.identifier.scopus84887451269-
dc.identifier.isi000322617200001-
dc.contributor.authorscopusid54391653200-
dc.contributor.authorscopusid7003771643-
dc.contributor.authorscopusid16026007600-
dc.contributor.authorscopusid7103279517-
dc.contributor.authorscopusid7404444793-
dc.contributor.authorscopusid35609452100-
dc.identifier.issue12485SS-
dc.relation.volume7-
dc.investigacionIngeniería y Arquitectura-
dc.type2Artículo-
dc.contributor.daisngid29585558-
dc.contributor.daisngid119600-
dc.contributor.daisngid1734824-
dc.contributor.daisngid33795-
dc.contributor.daisngid846472-
dc.contributor.daisngid116294-
dc.description.numberofpages15-
dc.utils.revision-
dc.contributor.wosstandardWOS:Santos, L-
dc.contributor.wosstandardWOS:Magli, E-
dc.contributor.wosstandardWOS:Vitulli, R-
dc.contributor.wosstandardWOS:Nunez, A-
dc.contributor.wosstandardWOS:Lopez, JF-
dc.contributor.wosstandardWOS:Sarmiento, R-
dc.date.coverdateNoviembre 2013-
dc.identifier.ulpgces
dc.description.sjr0,448
dc.description.jcr0,892
dc.description.sjrqQ2
dc.description.jcrqQ3
dc.description.scieSCIE
item.grantfulltextopen-
item.fulltextCon texto completo-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-1295-1594-
crisitem.author.orcid0000-0002-6304-2801-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameSantos Falcón, Lucana-
crisitem.author.fullNameNúñez Ordóñez, Antonio-
crisitem.author.fullNameLópez Feliciano, José Francisco-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
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