Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/44990
Title: On the hardware implementation of the arithmetic elements of the pairwise orthogonal transform
Authors: Santos, Lucana 
Blanes, Ian
García, Aday
Serra-Sagristà, Joan
López, José 
Sarmiento, Roberto 
UNESCO Clasification: 3307 Tecnología electrónica
Keywords: Image compression
Image coding
SPIHT algorithm
Issue Date: 2015
Journal: Journal of Applied Remote Sensing 
Abstract: The pairwise orthogonal transform (POT) is an attractive alternative to the Kahrunen- Loève transform for spectral decorrelation in on-board multispectral and hyperspectral image compression due to its reduced complexity. This work validates that the low complexity of the POT makes it feasible for a space-qualified field-programmable gate array (FPGA) implementation. A register transfer level description of the arithmetic elements of the POT is provided with the aim of achieving a low occupancy of resources and making it possible to synthesize the design on a space-qualified RTAX2000S and RTAX2000S-DSP. In order to accomplish these goals, the operations of the POT are fine-tuned such that their implementation footprint is minimized while providing equivalent coding performance. The most computationally demanding operations are solved by means of a lookup table. An additional contribution of this paper is a bit-exact description of the mathematical equations that are part of the transform, defined in such a way that they can be solved with integer arithmetic and implementations that can be easily cross-validated. Experimental results are presented, showing that it is feasible to implement the components of the POTon the mentioned FPGA.
URI: http://hdl.handle.net/10553/44990
ISSN: 1931-3195
DOI: 10.1117/1.JRS.9.097496
Source: Journal of Applied Remote Sensing,v. 9 (097496)
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