Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/44971
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Gonzalez, Carlos | en_US |
dc.contributor.author | Lopez, Sebastian | en_US |
dc.contributor.author | Mozos, Daniel | en_US |
dc.contributor.author | Sarmiento, Roberto | en_US |
dc.date.accessioned | 2018-11-22T06:16:19Z | - |
dc.date.available | 2018-11-22T06:16:19Z | - |
dc.date.issued | 2018 | en_US |
dc.identifier.issn | 1861-8200 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/44971 | - |
dc.description.abstract | A challenging problem in spectral unmixing is how to determine the number of endmembers in a given scene. One of the most popular ways to determine the number of endmembers is by estimating the virtual dimensionality (VD) of the hyperspectral image using the well-known Harsanyi–Farrand–Chang (HFC) method. Due to the complexity and high dimensionality of hyperspectral scenes, this task is computationally expensive. Reconfigurable field-programmable gate arrays (FPGAs) are promising platforms that allow hardware/software codesign and the potential to provide powerful onboard computing capabilities and flexibility at the same time. In this paper, we present the first FPGA design for the HFC-VD algorithm. The proposed method has been implemented on a Virtex-7 XC7VX690T FPGA and tested using real hyperspectral data collected by NASA’s Airborne Visible Infra-Red Imaging Spectrometer over the Cuprite mining district in Nevada and the World Trade Center in New York. Experimental results demonstrate that our hardware version of the HFC-VD algorithm can significantly outperform an equivalent software version, which makes our reconfigurable system appealing for onboard hyperspectral data processing. Most important, our implementation exhibits real-time performance with regard to the time that the hyperspectral instrument takes to collect the image data. | en_US |
dc.language | eng | en_US |
dc.relation.ispartof | Journal of Real-Time Image Processing | en_US |
dc.source | Journal of Real-Time Image Processing [ISSN 1861-8200], v. 15 (2), p. 297-308 | en_US |
dc.subject | 3307 Tecnología electrónica | en_US |
dc.subject.other | Number of endmembers estimation | en_US |
dc.subject.other | Hyperspectral imaging | en_US |
dc.subject.other | Field-programmable gate arrays (FPGAs) | en_US |
dc.subject.other | Virtual dimensionality | en_US |
dc.subject.other | Reconfigurable hardware | en_US |
dc.title | A novel FPGA-based architecture for the estimation of the virtual dimensionality in remotely sensed hyperspectral images | en_US |
dc.type | info:eu-repo/semantics/Article | es |
dc.type | Article | es |
dc.identifier.doi | 10.1007/s11554-014-0482-2 | |
dc.identifier.scopus | 84922380980 | - |
dc.identifier.isi | 000438650100007 | |
dc.contributor.authorscopusid | 35199832800 | - |
dc.contributor.authorscopusid | 57187722000 | - |
dc.contributor.authorscopusid | 6603237007 | - |
dc.contributor.authorscopusid | 35609452100 | - |
dc.description.lastpage | 308 | - |
dc.description.firstpage | 297 | - |
dc.relation.volume | 15 | - |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Artículo | en_US |
dc.contributor.daisngid | 1391678 | |
dc.contributor.daisngid | 465777 | |
dc.contributor.daisngid | 29952157 | |
dc.contributor.daisngid | 116294 | |
dc.contributor.wosstandard | WOS:Gonzalez, C | |
dc.contributor.wosstandard | WOS:Lopez, S | |
dc.contributor.wosstandard | WOS:Mozos, D | |
dc.contributor.wosstandard | WOS:Sarmiento, R | |
dc.date.coverdate | Agosto 2018 | |
dc.identifier.ulpgc | Sí | es |
dc.description.sjr | 0,366 | |
dc.description.jcr | 2,588 | |
dc.description.sjrq | Q2 | |
dc.description.jcrq | Q2 | |
dc.description.scie | SCIE | |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0002-2360-6721 | - |
crisitem.author.orcid | 0000-0002-4843-0507 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | López Suárez, Sebastián Miguel | - |
crisitem.author.fullName | Sarmiento Rodríguez, Roberto | - |
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