Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/43890
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dc.contributor.authorSantana Jaria, Oliverio Jesúsen_US
dc.contributor.authorFalcón, Ayoseen_US
dc.contributor.authorFernández García, Enriqueen_US
dc.contributor.authorMedina Rodríguez, Pedroen_US
dc.contributor.authorRamírez, Alexen_US
dc.contributor.authorValero, Mateoen_US
dc.date.accessioned2018-11-21T18:38:27Z-
dc.date.available2018-11-21T18:38:27Z-
dc.date.issued2002en_US
dc.identifier.isbn978-3-540-43674-4en_US
dc.identifier.issn0302-9743en_US
dc.identifier.urihttp://hdl.handle.net/10553/43890-
dc.description.abstractIndirect branch prediction is a performance limiting factor for current computer systems, preventing superscalar processors from exploiting the available ILP. Indirect branches are responsible for 55.7% of mispredictions in our benchmark set, although they only stand for 15.5% of dynamic branches. Moreover, a 10.8% average IPC speedup is achievable by perfectly predicting all indirect branches. The Multi-Stage Cascaded Predictor (MSCP) is a mechanism proposed for improving indirect branch prediction. In this paper, we show that a MSCP can replace a BTB and accurately predict the target address of both indirect and non-indirect branches. We do a detailed analysis of MSCP behavior and evaluate it in a realistic setup, showing that a 5.7% average IPC speedup is achievable.-
dc.languageengen_US
dc.publisherSpringeren_US
dc.relation.ispartofLecture Notes in Computer Scienceen_US
dc.sourceZima H.P., Joe K., Sato M., Seo Y., Shimasaki M. (eds) High Performance Computing. ISHPC 2002. Lecture Notes in Computer Science, vol 2327. Springer, Berlin, Heidelbergen_US
dc.subject330406 Arquitectura de ordenadores-
dc.subject.otherMicroarchitecture-
dc.subject.otherBranch prediction-
dc.subject.otherBranch target buffer-
dc.subject.otherIndirect branch-
dc.subject.otherMulti-stage cascaded predictor-
dc.titleA comprehensive analysis of indirect branch predictionen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conference4th International Symposium on High Performance Computing, ISHPC 2002en_US
dc.identifier.doi10.1007/3-540-47847-7_13en_US
dc.identifier.scopus68749090878-
dc.contributor.orcid#NODATA#-
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dc.contributor.orcid#NODATA#-
dc.contributor.authorscopusid7003605046-
dc.contributor.authorscopusid9733156400-
dc.contributor.authorscopusid36476145100-
dc.contributor.authorscopusid24605829000-
dc.contributor.authorscopusid32668033600-
dc.contributor.authorscopusid24475914200-
dc.identifier.eissn1611-3349-
dc.description.lastpage145en_US
dc.description.firstpage133en_US
dc.relation.volume2327en_US
dc.investigacionIngeniería y Arquitectura-
dc.type2Actas de congresosen_US
dc.identifier.eisbn978-3-540-47847-8-
dc.utils.revision-
dc.date.coverdateDiciembre 2002en_US
dc.identifier.conferenceidevents121368-
dc.identifier.ulpgc-
dc.description.jcr0,515-
dc.description.jcrqQ3-
item.grantfulltextopen-
item.fulltextCon texto completo-
crisitem.event.eventsstartdate15-05-2002-
crisitem.event.eventsenddate17-05-2002-
crisitem.author.deptGIR SIANI: Inteligencia Artificial, Robótica y Oceanografía Computacional-
crisitem.author.deptIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.deptDepartamento de Informática y Sistemas-
crisitem.author.deptDepartamento de Informática y Sistemas-
crisitem.author.deptDepartamento de Informática y Sistemas-
crisitem.author.orcid0000-0001-7511-5783-
crisitem.author.orcidhttps://orcid.org/0000-0001-9099-2573-
crisitem.author.parentorgIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.fullNameSantana Jaria, Oliverio Jesús-
crisitem.author.fullNameFernández García, Enrique-
crisitem.author.fullNameMedina Rodríguez, Pedro-
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