Single supply CMOS up level shifter for dual voltage system

Abstract

A single supply CMOS up level shifter (rsc-ls), for upconverting signals from 0.45V-0.9V logic level range up to 1V power supply voltage domain (Vdd), is introduced. From simulations results, the proposed shifter provides improvements of 63% and 69% in energy consumption and speed, respectively, when compared with a similar design, in 65nm CMOS process and low threshold voltage. For a Vdd of 1.2V we obtain up to 88% improvement in delay-energy product, when the input signal high voltage level is 0.7V with a frequency of 500MHz. We report a total static current reduction of up to 110 times. For an up shift of 0.45V to 1.2V at an output loading of 800fF, our design offers a delay of 0.38ns and an energy consumption of 1.57pJ.