Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/42015
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Martel Jordán, Ernestina Ángeles | en_US |
dc.contributor.author | Lazcano, Raquel | en_US |
dc.contributor.author | López Feliciano, José Francisco | en_US |
dc.contributor.author | Madroñal, Daniel | en_US |
dc.contributor.author | Salvador, Rubén | en_US |
dc.contributor.author | López, Sebastián | en_US |
dc.contributor.author | Juarez, Eduardo | en_US |
dc.contributor.author | Guerra, Raúl | en_US |
dc.contributor.author | Sanz, César | en_US |
dc.contributor.author | Sarmiento, Roberto | en_US |
dc.date.accessioned | 2018-09-28T08:39:38Z | - |
dc.date.available | 2018-09-28T08:39:38Z | - |
dc.date.issued | 2018 | en_US |
dc.identifier.issn | 2072-4292 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/42015 | - |
dc.description.abstract | Dimensionality reduction represents a critical preprocessing step in order to increase the efficiency and the performance of many hyperspectral imaging algorithms. However, dimensionality reduction algorithms, such as the Principal Component Analysis (PCA), suffer from their computationally demanding nature, becoming advisable for their implementation onto high-performance computer architectures for applications under strict latency constraints. This work presents the implementation of the PCA algorithm onto two different high-performance devices, namely, an NVIDIA Graphics Processing Unit (GPU) and a Kalray manycore, uncovering a highly valuable set of tips and tricks in order to take full advantage of the inherent parallelism of these high-performance computing platforms, and hence, reducing the time that is required to process a given hyperspectral image. Moreover, the achieved results obtained with different hyperspectral images have been compared with the ones that were obtained with a field programmable gate array (FPGA)-based implementation of the PCA algorithm that has been recently published, providing, for the first time in the literature, a comprehensive analysis in order to highlight the pros and cons of each option. | en_US |
dc.language | eng | en_US |
dc.publisher | 2072-4292 | |
dc.relation.ispartof | Remote Sensing | en_US |
dc.source | Remote Sensing [ISSN 2072-4292], v. 10(6), 864 | en_US |
dc.subject | 330790 Microelectrónica | en_US |
dc.subject.other | Hyperspectral imaging | en_US |
dc.subject.other | Dimensionality reduction | en_US |
dc.subject.other | Principal component analysis | en_US |
dc.subject.other | Jacobi method | en_US |
dc.subject.other | GPU | en_US |
dc.subject.other | Manycore | en_US |
dc.subject.other | FPGA | en_US |
dc.title | Implementation of the principal component analysis onto high-performance computer facilities for hyperspectral dimensionality reduction: results and comparisons | en_US |
dc.type | info:eu-repo/semantics/Article | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.3390/rs10060864 | en_US |
dc.identifier.scopus | 85048963409 | - |
dc.identifier.isi | 000436561800058 | - |
dc.contributor.authorscopusid | 22735081900 | - |
dc.contributor.authorscopusid | 57192839213 | - |
dc.contributor.authorscopusid | 7404444793 | - |
dc.contributor.authorscopusid | 57192829417 | - |
dc.contributor.authorscopusid | 23005852100 | - |
dc.contributor.authorscopusid | 57187722000 | - |
dc.contributor.authorscopusid | 36447485600 | - |
dc.contributor.authorscopusid | 56333613300 | - |
dc.contributor.authorscopusid | 7006751614 | - |
dc.contributor.authorscopusid | 35609452100 | - |
dc.identifier.issue | 6 | - |
dc.relation.volume | 10 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Artículo | en_US |
dc.contributor.daisngid | 8779379 | - |
dc.contributor.daisngid | 3634522 | - |
dc.contributor.daisngid | 2138004 | - |
dc.contributor.daisngid | 3360488 | - |
dc.contributor.daisngid | 1888017 | - |
dc.contributor.daisngid | 465777 | - |
dc.contributor.daisngid | 693458 | - |
dc.contributor.daisngid | 2216671 | - |
dc.contributor.daisngid | 384271 | - |
dc.contributor.daisngid | 116294 | - |
dc.utils.revision | Sí | en_US |
dc.contributor.wosstandard | WOS:Martel, E | - |
dc.contributor.wosstandard | WOS:Lazcano, R | - |
dc.contributor.wosstandard | WOS:Lopez, J | - |
dc.contributor.wosstandard | WOS:Madronal, D | - |
dc.contributor.wosstandard | WOS:Salvador, R | - |
dc.contributor.wosstandard | WOS:Lopez, S | - |
dc.contributor.wosstandard | WOS:Juarez, E | - |
dc.contributor.wosstandard | WOS:Guerra, R | - |
dc.contributor.wosstandard | WOS:Sanz, C | - |
dc.contributor.wosstandard | WOS:Sarmiento, R | - |
dc.date.coverdate | Junio 2018 | en_US |
dc.identifier.ulpgc | Sí | en_US |
dc.contributor.buulpgc | BU-TEL | en_US |
dc.description.sjr | 1,43 | |
dc.description.jcr | 4,118 | |
dc.description.sjrq | Q1 | |
dc.description.jcrq | Q1 | |
dc.description.scie | SCIE | |
item.grantfulltext | open | - |
item.fulltext | Con texto completo | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Telemática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0003-3459-5041 | - |
crisitem.author.orcid | 0000-0002-6304-2801 | - |
crisitem.author.orcid | 0000-0002-2360-6721 | - |
crisitem.author.orcid | 0000-0002-4303-3051 | - |
crisitem.author.orcid | 0000-0002-4843-0507 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Martel Jordán, Ernestina Ángeles | - |
crisitem.author.fullName | López Feliciano, José Francisco | - |
crisitem.author.fullName | López Suárez, Sebastián Miguel | - |
crisitem.author.fullName | Guerra Hernández,Raúl Celestino | - |
crisitem.author.fullName | Sarmiento Rodríguez, Roberto | - |
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