Please use this identifier to cite or link to this item: https://accedacris.ulpgc.es/jspui/handle/10553/157270
Title: ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs
Authors: Ruiz Luque, José Carlos 
UNESCO Clasification: 120317 Informática
Keywords: cache storage
microprocessor chips
processor scheduling
resource allocation
intertask conflict-aware CPU accounting, et al
Issue Date: 2009
Journal: International Conference on Parallel Architectures and Compilation Techniques
Conference: 18th International Conference on Parallel Architectures and Compilation Techniques (PACT 2009) 
Abstract: Chip-MultiProcessor (CMP) architectures are becoming more and more popular as an alternative to the traditional processors that only extract instruction-level parallelism from an application. CMPs introduce complexities when accounting CPU utilization. This is due to the fact that the progress done by an application during an interval of time highly depends on the activity of the other applications it is co-scheduled with. In this paper, we identify how an inaccurate measurement of the CPU utilization affects several key aspects of the system like the application scheduling or the charging mechanism in data centers. We propose a new hardware CPU accounting mechanism to improve the accuracy when measuring the CPU utilization in CMPs and compare it with the previous accounting mechanisms. Our results show that currently known mechanisms lead to a 19% average error when it comes to CPU utilization accounting. Our proposal reduces this error to less than 1% in a modeled 4-core processor system.
URI: https://accedacris.ulpgc.es/jspui/handle/10553/157270
ISBN: 978-0-7695-3771-9
ISSN: 1089-795X
DOI: 10.1109/PACT.2009.33
Source: 18th International Conference on Parallel Architectures and Compilation Techniques [ISBN 978-0-7695-3771-9],p. 203-213 (2009)
Appears in Collections:Actas de congresos
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