SHyLoC-e: Improving CCSDS Standard Compliant IP Cores for On-board Lossless Compression of Hyperspectral Images

Abstract

There is a growing interest in developing hardwareefficient implementations of compression algorithms for multispectral and hyperspectral sensors on-board flight systems. SHyLoC, composed by a pair of configurable and synthesizable IP cores, implements the CCSDS 121 and 123 lossless compression standards, and has been recently added to the set of the ESA’s IP portfolio. At the moment, this implementation does not cover the full functionality described in the CCSDS standards. This work presents the extensions proposed over the SHyLoC IP cores in order to be fully compliant with the full CCSDS standards, while at the same time achieving higher performance in terms of compression efficiency and throughput. On the one hand, the unit-delay predictor defined in the CCSDS-121 standard has been included in the hardware implementation. On the other hand, the extension of the CCSDS-123 IP includes some optimizations of the AHB interface in order to improve the throughput, enabling burst transfers, as well as the implementation of the custom initialization of weigh.