Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/121781
DC FieldValueLanguage
dc.contributor.authorQuinn, Hen_US
dc.contributor.authorRobinson, WHen_US
dc.contributor.authorRech, Pen_US
dc.contributor.authorAguirre, Men_US
dc.contributor.authorBarnard, Aen_US
dc.contributor.authorDesogus, Men_US
dc.contributor.authorEntrena, Len_US
dc.contributor.authorGarcia-Valderas, Men_US
dc.contributor.authorGuertin, SMen_US
dc.contributor.authorKaeli, Den_US
dc.contributor.authorKastensmidt, FLen_US
dc.contributor.authorKiddie, BTen_US
dc.contributor.authorSánchez Clemente, Antonio Joséen_US
dc.contributor.authorReorda, MSen_US
dc.contributor.authorSterpone, Len_US
dc.contributor.authorWirthlin, Men_US
dc.date.accessioned2023-04-10T17:29:52Z-
dc.date.available2023-04-10T17:29:52Z-
dc.date.issued2015en_US
dc.identifier.issn0018-9499en_US
dc.identifier.urihttp://hdl.handle.net/10553/121781-
dc.description.abstractPerformance benchmarks have been used over the years to compare different systems. These benchmarks can be useful for researchers trying to determine how changes to the technology, architecture, or compiler affect the system's performance. No such standard exists for systems deployed into high radiation environments, making it difficult to assess whether changes in the fabrication process, circuitry, architecture, or software affect reliability or radiation sensitivity. In this paper, we propose a benchmark suite for high-reliability systems that is designed for field-programmable gate arrays and microprocessors. We describe the development process and report neutron test data for the hardware and software benchmarks.en_US
dc.languageengen_US
dc.relation.ispartofIEEE TRANSACTIONS ON NUCLEAR SCIENCEen_US
dc.subject33 Ciencias tecnológicasen_US
dc.subject.otherField-programmable gate arrays (FPGAs)en_US
dc.subject.othersoft error ratesen_US
dc.subject.othersoft errorsen_US
dc.subject.othersoftware fault toleranceen_US
dc.titleUsing Benchmarks for Radiation Testing of Microprocessors and FPGAsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TNS.2015.2498313en_US
dc.identifier.scopus2-s2.0-84961775458-
dc.identifier.isiWOS:000367732600025-
dc.contributor.orcid#NODATA#-
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dc.identifier.issue6-
dc.investigacionIngeniería y Arquitecturaen_US
dc.utils.revisionen_US
dc.identifier.ulpgcen_US
dc.contributor.buulpgcBU-TELen_US
dc.description.sjr0,924
dc.description.jcr3,711
dc.description.sjrqQ1
dc.description.jcrqQ1
item.grantfulltextopen-
item.fulltextCon texto completo-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.orcid0000-0002-2142-7885-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameSánchez Clemente, Antonio José-
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