CMOS RF front-end receivers for DVB-SH

Abstract

The aim of this research work is to present different alternatives for implementing power and area efficient RF receivers for Digital TV based on DV B - SH specifi- cations. The results of the present work are integrated in an ambitious research project: RECITAL +, DV B - SH Digital TV Receiver, Spanish Ministry of Science and Innovation (TEC2008-06881-C03-01). In order to achieve the objective, the following milestones have been determined and achieved: 1. Study of DV B - SH standard and proposal for an advanced receiver architec- ture. This receiver will be conceived so as to incorporate optimal solutions regarding power consumption. 2. Commercially available silicon technology selection. 3. Development (design, tape-out and measurement) of basic building blocks to be part of the advanced DV B - SH receiver. In this regard, the design of the blocks that constitutes the RF front-end ( LNAs , MIXERs ) is proposed. 4. Integration and implementation of RF subsystems: the implementation of the chipset with the minimum number of external components will be studied.