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Title: Implementation of CCSDS Standards for Lossless Multispectral and Hyperspectral Satellite Image Compression
Authors: Santos Falcón, Lucana 
Gómez Rebordinos, Ana 
Sarmiento Rodríguez, Roberto 
UNESCO Clasification: 3325 Tecnología de las telecomunicaciones
Keywords: Image coding
Hyperspectral imaging
Field programmable gate arrays
Issue Date: 2020
Journal: IEEE Transactions on Aerospace and Electronic Systems 
Abstract: This paper presents the modeling, design, and implementation of two intellectual property (IP) cores that are compliant with the consultative committee for space data systems (CCSDS) 121.0-B-2 and CCSDS 123.0-B-1 lossless satellite image compression standards. The CCSDS 121.0-B-2 describes a lossless universal compressor based on a Rice adaptive encoding. The CCSDS 123.0-B-1 standard describes a lossless algorithm specifically designed for efficient on-board compression of hyperspectral and multispectral images, and it is based on a prediction and entropy-based encoding structure. Two options are offered for the latter: the sample-adaptive and the block-adaptive encoder, which corresponds to the CCSDS 121.0-B-2 algorithm. These IP cores have been designed as independent compressors, but they can be easily combined in a plug-and-play fashion to be used together thanks to a dedicated interface. Additionally, standard interfaces are provided for configuration and external memory access. The design process encompasses the consideration of several different hardware architectures in order to maximize throughput and optimize the requirements of on-board resources at the same time. Both IPs are compliant with the high degree of configurability considered in the standard. The obtained VHDL code is completely technology independent, so it can be used to target any field-programmable gate array (FPGA) or ASIC of interest in the space environment, aiming to perform efficiently compression in satellites despite the inherent constraints of these devices. Results are reported as implementation results for the FPGA devices that are currently considered most representative and suited for on-board use from Xilinx and Microsemi families. In particular, the CCSDS123 IP core reaches for the Virtex5 FX130 a throughput of 153.5 Msamples per second, comprising only 5% of the look-up table (LUTs) in the device.
ISSN: 0018-9251
DOI: 10.1109/TAES.2019.2929971
Source: IEEE Transactions on Aerospace and Electronic Systems [ISSN 0018-9251], v. 56(2), p. 1120-1138, (Abril 2020)
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