Exploring Modern Integrated Circuits Design in Harsh Environments.

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Structure: departamento de ingeniería electrónica y automática

Researcher: díez acereda, victoria you

Title Issue Date
RHBD Techniques to Mitigate SEU and SET in CMOS Frequency Synthesizers Díez Acereda, Victoria You ; Lalchand Khemchandani, Sunil ; Del Pino Suárez, Francisco Javier ; Mateos Angulo, Sergio Issued date: 2019 DOI: 10.3390/electronics8060690 Source: Electronics [ISSN 2079-9292], v. 8 (6), 690, (Junio 2019) SJR: 0,303 - Q2 JCR: 2,412 - Q2 SCIE Artículo