Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/53735
Campo DC | Valor | idioma |
---|---|---|
dc.contributor.author | Lopez, JF | |
dc.contributor.author | Sarmiento, R | |
dc.contributor.author | Eshraghian, K | |
dc.contributor.author | Nunez, A | |
dc.contributor.other | Sarmiento, Roberto | |
dc.contributor.other | Lopez, Jose | |
dc.date.accessioned | 2019-02-04T18:01:55Z | - |
dc.date.available | 2019-02-04T18:01:55Z | - |
dc.date.issued | 1997 | |
dc.identifier.issn | 0018-9200 | |
dc.identifier.uri | http://hdl.handle.net/10553/53735 | - |
dc.description.abstract | Two different techniques that allow the implementation of embedded ROM's using a conventional GaAs MESFET technology are presented, The first approach is based on a novel circuit structure named low leakage current FET circuit (L2FC), which reduces significantly subthreshold currents. The second approach is based on pseudo current mode logic (PCML) which is by far the best choice in terms of noise margin levels. This characteristic is found to be the key factor when implementing GaAs ROM's because of its degradation as the number of word lines is increased, A 5-Kb ROM and a 2-Kb ROM were designed giving delays in the order of 2 ns and less than 1 ns, respectively, The results demonstrate the effectiveness of these techniques and their significance toward improving the noise margin. | |
dc.publisher | 0018-9200 | |
dc.relation.ispartof | IEEE Journal of Solid-State Circuits | |
dc.source | Ieee Journal Of Solid-State Circuits[ISSN 0018-9200],v. 32 (4), p. 592-597 | |
dc.subject.other | Word | |
dc.title | Noise margin enhancement in GaAs ROM's using current mode logic | |
dc.type | info:eu-repo/semantics/Article | |
dc.type | Article | |
dc.identifier.isi | A1997WP15200015 | |
dcterms.isPartOf | Ieee Journal Of Solid-State Circuits | |
dcterms.source | Ieee Journal Of Solid-State Circuits[ISSN 0018-9200],v. 32 (4), p. 592-597 | |
dc.description.lastpage | 597 | |
dc.identifier.issue | 4 | |
dc.description.firstpage | 592 | |
dc.relation.volume | 32 | |
dc.type2 | Artículo | |
dc.identifier.wos | WOS:A1997WP15200015 | |
dc.contributor.daisngid | 846472 | |
dc.contributor.daisngid | 116294 | |
dc.contributor.daisngid | 228382 | |
dc.contributor.daisngid | 33795 | |
dc.identifier.investigatorRID | L-6017-2014 | |
dc.identifier.investigatorRID | L-6046-2014 | |
dc.contributor.wosstandard | WOS:Lopez, JF | |
dc.contributor.wosstandard | WOS:Sarmiento, R | |
dc.contributor.wosstandard | WOS:Eshraghian, K | |
dc.contributor.wosstandard | WOS:Nunez, A | |
dc.date.coverdate | Abril 1997 | |
dc.identifier.ulpgc | Sí | es |
dc.description.jcr | 0,922 | |
dc.description.jcrq | Q1 | |
dc.description.scie | SCIE | |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0002-2360-6721 | - |
crisitem.author.orcid | 0000-0002-4843-0507 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | López Suárez, Sebastián Miguel | - |
crisitem.author.fullName | Sarmiento Rodríguez, Roberto | - |
Colección: | Artículos |
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