A CMOS latched driver using bootstrap technique for low-voltage applications

Título:	A CMOS latched driver using bootstrap technique for low-voltage applications
Autores/as:	García, José C. Montiel-Nelson, Juan A. Nooshabadi, Saeid
Clasificación UNESCO:	3307 Tecnología electrónica
Palabras clave:	Logic Transistors Capacitance Picosecond phenomena Capacitors, et al.
Fecha de publicación:	2005
Publicación seriada:	Proceedings of SPIE - The International Society for Optical Engineering
Conferencia:	Conference on VLSI Circuits and Systems II
Resumen:	In this paper, we propose a high performance direct bootstrapped CMOS latched driver circuit (J-driver). It is a 28% faster and occupies a 58% less active area as compared to a counterpart circuit (L-driver) using indirect bootstrap technique. In addition, our driver J-driver reduces the power consumption by a 2% in driving capacitive loads from 1pF to 6pF. The challenge in designing this latched driver is to appropriately trade-off performance against the active area.
URI:	http://hdl.handle.net/10553/49683
ISBN:	0-8194-5832-5
ISSN:	0277-786X
DOI:	10.1117/12.608300
Fuente:	Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5837 PART I (37), p. 329-338
Colección:	Actas de congresos

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