Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/49660
Campo DC | Valor | idioma |
---|---|---|
dc.contributor.author | Navarro Botello,Héctor | en_US |
dc.contributor.author | Nooshabadi, S. | en_US |
dc.contributor.author | Montiel-Nelson, J. A. | en_US |
dc.contributor.other | Montiel-Nelson, Juan | - |
dc.date.accessioned | 2018-11-24T09:41:54Z | - |
dc.date.available | 2018-11-24T09:41:54Z | - |
dc.date.issued | 2009 | en_US |
dc.identifier.issn | 0013-5194 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/49660 | - |
dc.description.abstract | Satisfiability problems (SAT) for register transfer level designs combine arithmetic blocks with Boolean logic to form a mixed integer linear programming (MILP) environment. The classic model of the two-input n-bit adder for MILP is straightforward. However, proposed is a more efficient method using a new set of inequalities that describes its integer hull polyhedron. This special model reduces the number of branches needed to solve the whole integer problem, optimising the overall efficiency of the SAT solver. Experimental results show a CPU time reduction greater than one order of magnitude or higher, depending on the size of the problem. | en_US |
dc.language | spa | en_US |
dc.publisher | 0013-5194 | - |
dc.relation.ispartof | Electronics letters | en_US |
dc.source | Electronics Letters[ISSN 0013-5194],v. 45, p. 348-349 | en_US |
dc.subject | 3307 Tecnología electrónica | en_US |
dc.subject.other | adders | en_US |
dc.subject.other | Boolean algebra | en_US |
dc.subject.other | digital arithmetic | en_US |
dc.subject.other | integer programming | en_US |
dc.subject.other | Linear programming | en_US |
dc.subject.other | computability | en_US |
dc.title | Adder model for mixed integer linear programming | en_US |
dc.type | info:eu-repo/semantics/Article | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1049/el.2009.3637 | en_US |
dc.identifier.scopus | 63349084847 | - |
dc.identifier.isi | 000265233800007 | - |
dcterms.isPartOf | Electronics Letters | - |
dcterms.source | Electronics Letters[ISSN 0013-5194],v. 45 (7), p. 348-U13 | - |
dc.contributor.authorscopusid | 23028289000 | - |
dc.contributor.authorscopusid | 6602486254 | - |
dc.contributor.authorscopusid | 6603626866 | - |
dc.description.lastpage | 349 | en_US |
dc.description.firstpage | 348 | en_US |
dc.relation.volume | 45 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Artículo | en_US |
dc.identifier.wos | WOS:000265233800007 | - |
dc.contributor.daisngid | 8452012 | - |
dc.contributor.daisngid | 1184738 | - |
dc.contributor.daisngid | 184255 | - |
dc.contributor.daisngid | 480589 | - |
dc.identifier.investigatorRID | K-6805-2013 | - |
dc.utils.revision | Sí | en_US |
dc.contributor.wosstandard | WOS:Navarro, H | - |
dc.contributor.wosstandard | WOS:Nooshabadi, S | - |
dc.contributor.wosstandard | WOS:Montiel-Nelson, JA | - |
dc.date.coverdate | Abril 2009 | en_US |
dc.identifier.ulpgc | Sí | es |
dc.description.sjr | 0,665 | |
dc.description.jcr | 0,97 | |
dc.description.sjrq | Q1 | |
dc.description.jcrq | Q3 | |
dc.description.scie | SCIE | |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.author.dept | GIR IUMA: Equipos y Sistemas de Comunicación | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | GIR IUMA: Instrumentación avanzada | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0003-4323-8097 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Navarro Botello,Héctor | - |
crisitem.author.fullName | Montiel Nelson, Juan Antonio | - |
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