Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/49294
DC FieldValueLanguage
dc.contributor.authorGarcía, Luzen_US
dc.contributor.authorReyes, Víctoren_US
dc.contributor.authorBarreto, Dácilen_US
dc.contributor.authorMarrero, Gustavoen_US
dc.contributor.authorBautista, Tomásen_US
dc.contributor.authorNúñez, Antonioen_US
dc.contributor.otherBautista, Tomas-
dc.date.accessioned2018-11-24T05:59:23Z-
dc.date.available2018-11-24T05:59:23Z-
dc.date.issued2005en_US
dc.identifier.isbn0-8194-5832-5en_US
dc.identifier.issn0277-786Xen_US
dc.identifier.urihttp://hdl.handle.net/10553/49294-
dc.description.abstractTrends in multimedia consumer electronics, digital video and audio, aim to reach users through low-cost mobile devices connected to data broadcasting networks with limited bandwidth. An emergent broadcasting network is the digital audio broadcasting network (DAB) which provides CD quality audio transmission together with robustness and efficiency techniques to allow good quality reception in motion conditions. This paper focuses on the system-level evaluation of different architectural options to allow low bandwidth digital video reception over DAB, based on video compression techniques. Profiling and design space exploration techniques are applied over the ASP MPEG-4 decoder in order to find out the best HW/SW partition given the application and platform constraints. An innovative SystemC-based system-level design tool, called CASSE, is being used for modelling, exploration and evaluation of different ASP MPEG-4 decoder HW/SW partitions. System-level trade offs and quantitative data derived from this analysis are also presented in this work.en_US
dc.languageengen_US
dc.relation.ispartofProceedings of SPIE - The International Society for Optical Engineeringen_US
dc.sourceProceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5837 PART II (87), p. 785-794en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherVideo compressionen_US
dc.subject.otherSystems modelingen_US
dc.subject.otherBridgesen_US
dc.subject.otherReceiversen_US
dc.subject.otherMultimediaen_US
dc.titleEvaluation of architectures for an ASP MPEG-4 decoder using a system-level design methodologyen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conferenceConference on VLSI Circuits and Systems IIen_US
dc.identifier.doi10.1117/12.608807en_US
dc.identifier.scopus28344437097-
dc.identifier.isi000231723000079-
dcterms.isPartOfVLSI Circuits and Systems II, Pts 1 and 2-
dcterms.sourceVLSI Circuits and Systems II, Pts 1 and 2[ISSN 0277-786X],v. 5837, p. 785-794-
dc.contributor.authorscopusid57199817917-
dc.contributor.authorscopusid7004422872-
dc.contributor.authorscopusid6701807794-
dc.contributor.authorscopusid36931592400-
dc.contributor.authorscopusid6603190709-
dc.contributor.authorscopusid7103279517-
dc.description.lastpage794en_US
dc.identifier.issue87-
dc.description.firstpage785en_US
dc.relation.volume5837 PART IIen_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.identifier.wosWOS:000231723000079-
dc.contributor.daisngid31350463-
dc.contributor.daisngid24371650-
dc.contributor.daisngid20439770-
dc.contributor.daisngid124245-
dc.contributor.daisngid5870089-
dc.contributor.daisngid1716505-
dc.contributor.daisngid1460578-
dc.contributor.daisngid30917840-
dc.contributor.daisngid2227678-
dc.contributor.daisngid33795-
dc.contributor.daisngid10359097-
dc.identifier.investigatorRIDA-9082-2011-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Garcia, L-
dc.contributor.wosstandardWOS:Reyes, V-
dc.contributor.wosstandardWOS:Barreto, D-
dc.contributor.wosstandardWOS:Marrero, G-
dc.contributor.wosstandardWOS:Bautista, T-
dc.contributor.wosstandardWOS:Nunez, A-
dc.date.coverdateDiciembre 2005en_US
dc.identifier.conferenceidevents120464-
dc.identifier.ulpgces
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.event.eventsstartdate09-05-2005-
crisitem.event.eventsenddate11-05-2005-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-3784-5504-
crisitem.author.orcid0000-0002-5368-3680-
crisitem.author.orcid0000-0003-1295-1594-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameMarrero Callicó, Gustavo Iván-
crisitem.author.fullNameBautista Delgado, Tomás-
crisitem.author.fullNameNúñez Ordóñez, Antonio-
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