Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/49292
Campo DC Valoridioma
dc.contributor.authorJia, Z. Jianen_US
dc.contributor.authorBautista, Tomásen_US
dc.contributor.authorNúñez, Antonioen_US
dc.contributor.authorGuerra, Cayetanoen_US
dc.contributor.authorHernández, Marioen_US
dc.date.accessioned2018-11-24T05:58:16Z-
dc.date.available2018-11-24T05:58:16Z-
dc.date.issued2008en_US
dc.identifier.isbn9780769534749en_US
dc.identifier.urihttp://hdl.handle.net/10553/49292-
dc.description.abstractIn this paper, we present the strategy for evaluating the performance of a variety of configurations of an architecture template for a computer vision system (CVS). For this study a generic model of an architecture is used to address the modular design of the CVS. This modular nature approach could be used to build a more complex system by integrating several applications which perform different kind of data processing issues but sharing a common architecture. In our current work, a visual tracking system with real-time behaviour (25 frames/sec) is modelled and mapped on the model of a pipelined multiprocessor platform. The tracking system performance and shared resource usage were analyzed to determine the real architecture capacity and also to find out possible bottlenecks in order to propose new solutions which allow more applications to be mapped on the platform template in the future.en_US
dc.languageengen_US
dc.relation.ispartofProceedings - 2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008en_US
dc.sourceProceedings - 2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008 (4731793), p. 193-198en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherheterogeneous MPSoCen_US
dc.subject.otherDesign space explorationen_US
dc.subject.othertracking algorithmen_US
dc.subject.otherplatform-based designen_US
dc.subject.otherField programmable gate arraysen_US
dc.subject.otherComputer visionen_US
dc.titleDesign space exploration and performance analysis for the modular design of CVS in a heterogeneous MPSoCen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conference2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008en_US
dc.identifier.doi10.1109/ReConFig.2008.33en_US
dc.identifier.scopus62349084577-
dc.contributor.authorscopusid55434973300-
dc.contributor.authorscopusid6603190709-
dc.contributor.authorscopusid7103279517-
dc.contributor.authorscopusid8944017700-
dc.contributor.authorscopusid57212239402-
dc.contributor.authorscopusid7401972145-
dc.description.lastpage198en_US
dc.identifier.issue4731793-
dc.description.firstpage193en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.utils.revisionen_US
dc.date.coverdateDiciembre 2008en_US
dc.identifier.conferenceidevents121361-
dc.identifier.ulpgces
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.event.eventsstartdate03-12-2008-
crisitem.event.eventsenddate05-12-2008-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR SIANI: Inteligencia Artificial, Redes Neuronales, Aprendizaje Automático e Ingeniería de Datos-
crisitem.author.deptIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.deptDepartamento de Informática y Sistemas-
crisitem.author.deptGIR SIANI: Inteligencia Artificial, Redes Neuronales, Aprendizaje Automático e Ingeniería de Datos-
crisitem.author.deptIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.deptDepartamento de Informática y Sistemas-
crisitem.author.orcid0000-0002-5368-3680-
crisitem.author.orcid0000-0003-1295-1594-
crisitem.author.orcid0000-0003-1381-2262-
crisitem.author.orcid0000-0001-9717-8048-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.parentorgIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.fullNameBautista Delgado, Tomás-
crisitem.author.fullNameNúñez Ordóñez, Antonio-
crisitem.author.fullNameGuerra Artal, Cayetano-
crisitem.author.fullNameHernández Tejera, Francisco Mario-
Colección:Actas de congresos
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