Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/49287
DC FieldValueLanguage
dc.contributor.authorMontiel-Nelson, Juan A.en_US
dc.contributor.authorNavarro, Víctoren_US
dc.contributor.authorSosa, Javieren_US
dc.contributor.authorBautista, Tomásen_US
dc.contributor.otherBautista, Tomas-
dc.contributor.otherSosa, Javier-
dc.contributor.otherMontiel-Nelson, Juan A.-
dc.date.accessioned2018-11-24T05:55:40Z-
dc.date.available2018-11-24T05:55:40Z-
dc.date.issued2014en_US
dc.identifier.issn0026-2692en_US
dc.identifier.urihttp://hdl.handle.net/10553/49287-
dc.description.abstractIn this paper, the optimization and analysis of threshold configurable regenerative comparators (TC) for use in ultra-low power consumption ADCs is introduced (TC-ADC). Using a 90 nm CMOS technology, the obtained comparator achieves a 77% improvement in terms of power consumption (3 mu W) when compared with previously published TC comparators, while maintains the same full scale specification ( +/- 160 mv). The proposed design exhibits a delay time of 1.31 ns - a 20% of improvement - which allows achieving for a 6-bit TC-ADC up to 25 MS/s for a sampling period of 40 ns. Furthermore, offset, gain and non-linearity errors of a 6-bit TC-ADC is also analyzed for both perfectly matched devices and under the presence of manufacturing dependent device mismatch scenarios. The higher energy efficiency of the optimized comparator increases the linearity of the TC-ADC by a 50% in offset, gain, DNL and INL. Although, a mismatch analysis of 30 MonteCarlo simulations and 3 sigma device parameter variations exhibits a higher non-linearity for the threshold comparators, the gain, offset and DNL errors for the optimized one are diminished in a 37%, 12% and 17%, respectively.en_US
dc.languageengen_US
dc.publisher0026-2692-
dc.relation.ispartofMicroelectronicsen_US
dc.sourceMicroelectronics Journal[ISSN 0026-2692],v. 45, p. 1247-1253en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherThreshold configuring ADCen_US
dc.subject.otherUltra-low power analog-to-digital convertersen_US
dc.subject.otherReconfigurable analog circuitsen_US
dc.subject.otherFTL comparatorsen_US
dc.subject.otherLow power analog designen_US
dc.subject.otherRegenerative comparatorsen_US
dc.titleAnalysis and optimization of dynamically reconfigurable regenerative comparators for ultra-low power 6-bit TC-ADCs in 90 nm CMOS technologiesen_US
dc.typeinfo:eu-repo/semantics/Articleen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.mejo.2014.02.005en_US
dc.identifier.scopus84908674803-
dc.identifier.isi000343345600003-
dcterms.isPartOfMicroelectronics Journal-
dcterms.sourceMicroelectronics Journal[ISSN 0026-2692],v. 45 (10), p. 1247-1253-
dc.contributor.authorscopusid6603626866-
dc.contributor.authorscopusid57198264956-
dc.contributor.authorscopusid7006310063-
dc.contributor.authorscopusid6603190709-
dc.description.lastpage1253en_US
dc.description.firstpage1247en_US
dc.relation.volume45en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Artículoen_US
dc.identifier.wosWOS:000343345600003-
dc.contributor.daisngid480589-
dc.contributor.daisngid349961-
dc.contributor.daisngid9979941-
dc.contributor.daisngid1739656-
dc.contributor.daisngid2227678-
dc.identifier.investigatorRIDA-9082-2011-
dc.identifier.investigatorRIDNo ID-
dc.identifier.investigatorRIDNo ID-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Montiel-Nelson, JA-
dc.contributor.wosstandardWOS:Navarro, V-
dc.contributor.wosstandardWOS:Sosa, J-
dc.contributor.wosstandardWOS:Bautista, T-
dc.date.coverdateEnero 2014en_US
dc.identifier.ulpgces
dc.description.jcr0,836
dc.description.jcrqQ3
dc.description.scieSCIE
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptIngeniería Electrónica y Automática-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptIngeniería Electrónica y Automática-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptIngeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-4323-8097-
crisitem.author.orcid0000-0003-1838-3073-
crisitem.author.orcid0000-0002-5368-3680-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameMontiel Nelson, Juan Antonio-
crisitem.author.fullNameNavarro Botello, Victor-
crisitem.author.fullNameSosa González, Carlos Javier-
crisitem.author.fullNameBautista Delgado, Tomás-
Appears in Collections:Artículos
Show simple item record

SCOPUSTM   
Citations

8
checked on Sep 19, 2021

WEB OF SCIENCETM
Citations

5
checked on Sep 19, 2021

Page view(s)

9
checked on Sep 18, 2021

Google ScholarTM

Check

Altmetric


Share



Export metadata



Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.