Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/48904
Campo DC Valoridioma
dc.contributor.authorDíaz, Jorge L.en_US
dc.contributor.authorBarreto, Dáciien_US
dc.contributor.authorGarcía, Luzen_US
dc.contributor.authorMarrero, Gustavoen_US
dc.contributor.authorCarballo, Pedro P.en_US
dc.contributor.authorNúñez, Antonioen_US
dc.contributor.otherP. Carballo, Pedro-
dc.date.accessioned2018-11-24T02:00:54Z-
dc.date.available2018-11-24T02:00:54Z-
dc.date.issued2007en_US
dc.identifier.isbn978-0-8194-6718-8en_US
dc.identifier.issn0277-786Xen_US
dc.identifier.urihttp://hdl.handle.net/10553/48904-
dc.description.abstractIn this paper we present a novel methodology to accelerate an MPEG-4 video decoder using software/hardware co-design for wireless DAB/DMB networks. Software support includes the services provided by the embedded kernel mu C/OS-II, and the application tasks mapped to software. Hardware support includes several custom co-processors and a communication architecture with bridges to the main system bus and with a dual port SRAM. Synchronization among tasks is achieved at two levels, by a hardware protocol and by kernel level scheduling services. Our reference application is an MPEG-4 video decoder composed of several software functions and written using a special C++ library named CASSE. Profiling and space exploration techniques were used previously over the Advanced Simple Profile (ASP) MPEG-4 decoder to determinate the best HW/SW partition developed here. This research is part of the ARTEMI project and its main goal is the establishment of methodologies for the design of real-time complex digital systems using Programmable Logic Devices with embedded microprocessors as target technology and the design of multimedia systems for broadcasting networks as reference application.en_US
dc.languageengen_US
dc.relation.ispartofProceedings of SPIE - The International Society for Optical Engineeringen_US
dc.sourceProceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 6590 (65900B)en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherField programmable gate arraysen_US
dc.subject.otherVideoen_US
dc.subject.otherMultimediaen_US
dc.subject.otherTelecommunicationsen_US
dc.subject.otherSuper resolutionen_US
dc.subject.otherComputer programmingen_US
dc.subject.otherComputer simulationsen_US
dc.titleAccelerating a MPEG-4 video decoder through custom software/hardware co-designen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conferenceConference on VLSI Circuits and Systems IIIen_US
dc.identifier.doi10.1117/12.722068en_US
dc.identifier.scopus36248930965-
dc.identifier.isi000250425000012-
dcterms.isPartOfVlsi Circuits And Systems Iii-
dcterms.sourceVlsi Circuits And Systems Iii[ISSN 0277-786X],v. 6590-
dc.contributor.authorscopusid36851611200-
dc.contributor.authorscopusid55405631400-
dc.contributor.authorscopusid57199817917-
dc.contributor.authorscopusid36931592400-
dc.contributor.authorscopusid6602499289-
dc.contributor.authorscopusid7103279517-
dc.identifier.issue65900B-
dc.relation.volume6590en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.identifier.wosWOS:000250425000012-
dc.contributor.daisngid9788100-
dc.contributor.daisngid4704677-
dc.contributor.daisngid4798302-
dc.contributor.daisngid5713971-
dc.contributor.daisngid1460578-
dc.contributor.daisngid506422-
dc.contributor.daisngid3056889-
dc.contributor.daisngid33795-
dc.identifier.investigatorRIDF-6600-2014-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Diaz, JL-
dc.contributor.wosstandardWOS:Barreto, D-
dc.contributor.wosstandardWOS:Garcia, L-
dc.contributor.wosstandardWOS:Marrero, G-
dc.contributor.wosstandardWOS:Carballo, PP-
dc.contributor.wosstandardWOS:Nunez, A-
dc.date.coverdateNoviembre 2007en_US
dc.identifier.conferenceidevents120577-
dc.identifier.ulpgces
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-3784-5504-
crisitem.author.orcid0000-0001-7912-8768-
crisitem.author.orcid0000-0002-3784-5504-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameMarrero Callicó, Gustavo Iván-
crisitem.author.fullNamePérez Carballo, Pedro Francisco-
crisitem.author.fullNameMarrero Callicó, Gustavo Iván-
crisitem.event.eventsstartdate02-05-2007-
crisitem.event.eventsenddate04-05-2007-
Colección:Actas de congresos
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