Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/48903
Campo DC Valoridioma
dc.contributor.authorSánchez-Peña, Armandoen_US
dc.contributor.authorCarballo, Pedro P.en_US
dc.contributor.authorNúñez, Antonioen_US
dc.contributor.otherP. Carballo, Pedro-
dc.date.accessioned2018-11-24T02:00:23Z-
dc.date.available2018-11-24T02:00:23Z-
dc.date.issued2007en_US
dc.identifier.isbn978-0-8194-6718-8en_US
dc.identifier.issn0277-786Xen_US
dc.identifier.urihttp://hdl.handle.net/10553/48903-
dc.description.abstractThis paper presents a simple environment for the verification of AMBA 3 AXI systems in Verification IP (VIP) production called VIPACES (Verification Interface Primitives for the development of AXI Compliant Elements and Systems). These primitives are presented as a not compiled library written in SystemC where interfaces are the core of the library. The definition of interfaces instead of generic modules let the user construct custom modules improving the resources spent during the verification phase as well as easily adapting his modules to the AMBA 3 AXI protocol. This topic is the main discussion in the VIPACES library. The paper focuses on comparing and contrasting the main interconnection schemes for ANWA 3 AXI as modeled by VIPACES. For assessing these results we propose a validation scenario with a particular architecture belonging to the domain of MPEG4 video decoding,. which is compound by an AXI bus connecting an IDCT and other processing resources.en_US
dc.languageengen_US
dc.relation.ispartofProceedings of SPIE - The International Society for Optical Engineeringen_US
dc.sourceProceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 6590 (65900Q)en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherNetwork on a chipen_US
dc.subject.otherSystem on a chipen_US
dc.subject.otherInterfacesen_US
dc.subject.otherTelecommunicationsen_US
dc.subject.otherComputer architectureen_US
dc.titleExploring system interconnection architectures with VIPACES: From direct connections to NoCsen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conferenceConference on VLSI Circuits and Systems IIIen_US
dc.identifier.doi10.1117/12.722054en_US
dc.identifier.scopus36248954978-
dc.identifier.isi000250425000026-
dcterms.isPartOfVlsi Circuits And Systems Iii-
dcterms.sourceVlsi Circuits And Systems Iii[ISSN 0277-786X],v. 6590-
dc.contributor.authorscopusid18937092700-
dc.contributor.authorscopusid6602499289-
dc.contributor.authorscopusid7103279517-
dc.identifier.issue65900Q-
dc.relation.volume6590en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.identifier.wosWOS:000250425000026-
dc.contributor.daisngid13628225-
dc.contributor.daisngid32398117-
dc.contributor.daisngid3056889-
dc.contributor.daisngid33795-
dc.identifier.investigatorRIDF-6600-2014-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Sanchez-Pena, A-
dc.contributor.wosstandardWOS:Carballo, PP-
dc.contributor.wosstandardWOS:Nunez, A-
dc.date.coverdateNoviembre 2007en_US
dc.identifier.conferenceidevents120577-
dc.identifier.ulpgces
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.event.eventsstartdate02-05-2007-
crisitem.event.eventsenddate04-05-2007-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0001-7912-8768-
crisitem.author.orcid0000-0001-7912-8768-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNamePérez Carballo, Pedro Francisco-
crisitem.author.fullNamePérez Carballo, Pedro Francisco-
Colección:Actas de congresos
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