Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45085
DC FieldValueLanguage
dc.contributor.authorReina, Rodrigo M.en_US
dc.contributor.authorCharry, Edgar R.en_US
dc.contributor.authorLopez, José F.en_US
dc.contributor.authorSarmiento, R.en_US
dc.date.accessioned2018-11-22T07:09:15Z-
dc.date.available2018-11-22T07:09:15Z-
dc.date.issued1998en_US
dc.identifier.isbn0818687045en_US
dc.identifier.isbn9780818687044
dc.identifier.urihttp://hdl.handle.net/10553/45085-
dc.description.abstractIn this paper we report the design of a new adder structure suitable for high speed, low power, digital applications. This adder was implemented using a new logic proposed recently, namely Pseudo-dynamic Latched Logic (PDDL), in MESFET technology using Vitesse H-GaAs III 0.6 /spl mu/m technology. Static and pseudo-dynamic adders were studied in order to make comparisons in terms of delay and power dissipation. These circuits were chosen due to the fact that they have a strong influence on the performance of data and signal processors. HSPICE simulation indicates operation up to 833 MHz with a 1 V power supply. Considering the delay-power characteristics as a function of power supply, it was found that a good tradeoff is obtained when using a 1 V power supply. Power dissipation of 4.96 /spl mu/W/MHz was obtained. Such extremely low power dissipation confirms that with this type of logic, high performance VLSI systems can be implemented.en_US
dc.languageengen_US
dc.relation.ispartofProceedings - 11th Brazilian Symposium on Integrated Circuit Design, SBCCI 1998en_US
dc.sourceProceedings - 11th Brazilian Symposium on Integrated Circuit Design, SBCCI 1998,v. 1998-September (715441), p. 200-203en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherGallium arsenideen_US
dc.subject.otherPower dissipationen_US
dc.subject.otherPower suppliesen_US
dc.subject.otherDelayen_US
dc.subject.otherMESFETsen_US
dc.titleCircuits for low power consumption in GaAs technologyen_US
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.typeConferenceObjectes
dc.relation.conference11th Brazilian Symposium on Integrated Circuit Design, SBCCI 1998
dc.identifier.doi10.1109/SBCCI.1998.715441
dc.identifier.scopus85052110325-
dc.contributor.authorscopusid57196765280-
dc.contributor.authorscopusid6602862820-
dc.contributor.authorscopusid7404444793-
dc.contributor.authorscopusid35609452100-
dc.description.lastpage203-
dc.identifier.issue715441-
dc.description.firstpage200-
dc.relation.volume1998-September-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.utils.revisionen_US
dc.date.coverdateEnero 1998
dc.identifier.conferenceidevents121633
dc.identifier.ulpgces
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-6304-2801-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameLópez Feliciano, José Francisco-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
crisitem.event.eventsstartdate30-09-1998-
crisitem.event.eventsenddate03-10-1998-
Appears in Collections:Actas de congresos
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