Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45079
DC FieldValueLanguage
dc.contributor.authorNooshabadi, S.en_US
dc.contributor.authorMontiel-Nelson, J. A.en_US
dc.contributor.authorNúñez, A.en_US
dc.contributor.authorSarmiento, R.en_US
dc.contributor.authorSosa González, Carlos Javieren_US
dc.date.accessioned2018-11-22T07:06:32Z-
dc.date.available2018-11-22T07:06:32Z-
dc.date.issued2000en_US
dc.identifier.issn1530-1591en_US
dc.identifier.urihttp://hdl.handle.net/10553/45079-
dc.description.abstractA single phase latch (SPL) suitable for GaAs domino logic gates and compatible with DCFL is presented. Two versions of the SPL are reported in this work: single ended SPL used in pure domino logic and differential SPL used in dynamic cascode voltage switch logic. SPL is compared with other common GaAs dynamic circuits and latches. The results demonstrate that SPL is superior in terms of device count, area, clock rate and power consumption.en_US
dc.languageengen_US
dc.relation.ispartofProceedings -Design, Automation and Test in Europe, DATEen_US
dc.sourceProceedings -Design, Automation and Test in Europe, DATE[ISSN 1530-1591] (840893), p. 760en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherGallium arsenideen_US
dc.subject.otherLogic devicesen_US
dc.subject.otherEnergy consumptionen_US
dc.subject.otherSwitchesen_US
dc.subject.otherFrequencyen_US
dc.titleA single phase latch for high speed GaAs domino circuitsen_US
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.typeConferenceObjectes
dc.relation.conferenceDesign, Automation and Test in Europe Conference and Exhibition 2000, DATE 2000
dc.identifier.doi10.1109/DATE.2000.840893
dc.identifier.scopus84893711319-
dc.contributor.authorscopusid6602486254-
dc.contributor.authorscopusid6603626866-
dc.contributor.authorscopusid7103279517-
dc.contributor.authorscopusid35609452100-
dc.contributor.authorscopusid56231679300-
dc.description.lastpage760-
dc.identifier.issue840893-
dc.description.firstpage760-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.utils.revisionen_US
dc.date.coverdateDiciembre 2000
dc.identifier.conferenceidevents121502
dc.identifier.ulpgces
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.event.eventsstartdate27-03-2000-
crisitem.event.eventsenddate30-03-2000-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-4323-8097-
crisitem.author.orcid0000-0003-1295-1594-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.orcid0000-0003-1838-3073-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameMontiel Nelson, Juan Antonio-
crisitem.author.fullNameNúñez Ordóñez, Antonio-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
crisitem.author.fullNameSosa González, Carlos Javier-
Appears in Collections:Actas de congresos
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