Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45077
DC FieldValueLanguage
dc.contributor.authorMontiel-Nelson, J. A.en_US
dc.contributor.authorDe Armas Sosa, Valentínen_US
dc.contributor.authorSarmiento Rodríguez, Robertoen_US
dc.contributor.authorNúñez Ordóñez, Antonioen_US
dc.date.accessioned2018-11-22T07:05:37Z-
dc.date.available2018-11-22T07:05:37Z-
dc.date.issued2001en_US
dc.identifier.isbn0-7695-1025-6en_US
dc.identifier.issn1948-3287en_US
dc.identifier.otherWoS-
dc.identifier.urihttp://hdl.handle.net/10553/45077-
dc.description.abstractA full-custom layout style and its cell model are presented. Its power supply and ground rails distribution is not only of very low self-inductance, but it is also independent of cell dimensions. Cell layouts following the proposed model reduce greatly switching current effects at high frequency. The underlying cell architecture is regular and suitable to design automation without sacrificing any advantages of the full-custom design. Layout channel density of a subset of MCNC'91 two-level circuit benchmarks have been obtained. Comparisons demonstrate that the layout of combinational circuits in the high speed cell model are compact and minimize the routing area. A cell compiler has been used as a cell library builder and it is embedded in a random logic macrocell and an iterative logic array generator. It is shown that the cell and macrocell compiler generates complex and compact layouts. The technique is demonstrated for GaAs processes up to 4 GHz, but it can be directly applied to deep submicron CMOS processes as well.-
dc.languageengen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.ispartofProceedings (International Symposium on Quality Electronic Design)en_US
dc.sourceProceedings - International Symposium on Quality Electronic Design, ISQED [ISSN 1948-3287], v. 2001-January (915231), p. 223-228en_US
dc.subject3307 Tecnología electrónica-
dc.subject.otherCMOS logic circuits-
dc.subject.otherMacrocell networks-
dc.subject.otherPower supplies-
dc.subject.otherCombinational circuits-
dc.subject.otherDesign automation-
dc.subject.otherRouting-
dc.subject.otherRails-
dc.titleA compact layout technique for reducing switching current effects in high speed circuitsen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conference2nd IEEE International Symposium on Quality Electronic Design, ISQED 2001en_US
dc.identifier.doi10.1109/ISQED.2001.915231en_US
dc.identifier.scopus84949957657-
dc.identifier.isi000168102000030-
dc.contributor.authorscopusid6603626866-
dc.contributor.authorscopusid6603181073-
dc.contributor.authorscopusid35609452100-
dc.contributor.authorscopusid7103279517-
dc.description.lastpage228en_US
dc.identifier.issue915231-
dc.description.firstpage223en_US
dc.relation.volume2001-Januaryen_US
dc.investigacionIngeniería y Arquitectura-
dc.type2Actas de congresosen_US
dc.contributor.daisngid480589-
dc.contributor.daisngid13379932-
dc.contributor.daisngid116294-
dc.contributor.daisngid7494592-
dc.description.numberofpages6en_US
dc.utils.revision-
dc.contributor.wosstandardWOS:Montiel-Nelson, JA-
dc.contributor.wosstandardWOS:de Armas, V-
dc.contributor.wosstandardWOS:Sarmiento, R-
dc.contributor.wosstandardWOS:Nunez, A-
dc.date.coverdateEnero 2001en_US
dc.identifier.conferenceidevents120293-
dc.identifier.ulpgc-
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-4323-8097-
crisitem.author.orcid0000-0002-1017-8107-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.orcid0000-0003-1295-1594-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameMontiel Nelson, Juan Antonio-
crisitem.author.fullNameDe Armas Sosa, Valentín-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
crisitem.author.fullNameNúñez Ordóñez, Antonio-
crisitem.event.eventsstartdate26-03-2001-
crisitem.event.eventsenddate28-03-2001-
Appears in Collections:Actas de congresos
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