Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45060
DC FieldValueLanguage
dc.contributor.authorSosa, J.en_US
dc.contributor.authorMontiel-Nelson, Juan A.en_US
dc.contributor.authorNavarro, Héctoren_US
dc.contributor.authorShahdadpuri, Mahendraen_US
dc.contributor.authorSarmiento, R.en_US
dc.contributor.otherSosa, Javier-
dc.contributor.otherMontiel-Nelson, Juan-
dc.contributor.otherSarmiento, Roberto-
dc.date.accessioned2018-11-22T06:57:55Z-
dc.date.available2018-11-22T06:57:55Z-
dc.date.issued2003en_US
dc.identifier.isbn0-8194-4977-6en_US
dc.identifier.issn0277-786Xen_US
dc.identifier.urihttp://hdl.handle.net/10553/45060-
dc.description.abstractA system-level verification methodology for advanced switch fabrics is introduced in this paper. Due to the short life cycles and the changing standards, the design and verification of new products require new design and verification tools. As result of our methodology, a verification framework is also presented. The decomposition of each interface of the switch fabric allows the reconfiguration of the framework, when a new revision of the design is defined. This idea promotes the reuse of the main interface code and verification statements. The development of the verification framework in C++, 'e'1 and Verilog demonstrates that our methodology can be applied independently of the programming language. New features, added to the framework, such as error insertion, enhance the verification coverage for corner cases. On the other hand, the golden reference layer is the key of the automatic verification, because a high level model can be used as reference model to check the correctness of the design automatically. Several commercial and non-commercial advanced switch fabrics have been verified using this method. The usefulness of the proposed methodology is demonstrated by GigaStream Chip Set2 functional success and the saving of a 60% in the verification time per effort unit.en_US
dc.languageengen_US
dc.relation.ispartofProceedings of SPIE - The International Society for Optical Engineeringen_US
dc.sourceProceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 187-198en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherVerificationen_US
dc.subject.otherModel checkingen_US
dc.subject.otherTheorem proveren_US
dc.titleSystem-level verification methodology for advanced switch fabricsen_US
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.typeConferenceObjectes
dc.relation.conferenceConference on VLSI Circuits and Systems
dc.relation.conferenceVLSI Circuits and Systems
dc.identifier.doi10.1117/12.498612
dc.identifier.scopus0041327753-
dc.identifier.isi000183950600019-
dcterms.isPartOfVlsi Circuits And Systems
dcterms.sourceVlsi Circuits And Systems[ISSN 0277-786X],v. 5117, p. 187-198
dc.contributor.authorscopusid56231679300-
dc.contributor.authorscopusid6603626866-
dc.contributor.authorscopusid23028289000-
dc.contributor.authorscopusid6505513329-
dc.contributor.authorscopusid35609452100-
dc.description.lastpage198-
dc.description.firstpage187-
dc.relation.volume5117-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.identifier.wosWOS:000183950600019-
dc.contributor.daisngid1739656-
dc.contributor.daisngid480589-
dc.contributor.daisngid34640290
dc.contributor.daisngid1510114-
dc.contributor.daisngid12250291-
dc.contributor.daisngid116294-
dc.identifier.investigatorRIDL-8617-2014-
dc.identifier.investigatorRIDK-6805-2013-
dc.identifier.investigatorRIDNo ID-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Sosa, J
dc.contributor.wosstandardWOS:Montiel-Nelson, JA
dc.contributor.wosstandardWOS:Navarro, H
dc.contributor.wosstandardWOS:Shahdadpuri, M
dc.contributor.wosstandardWOS:Sarmiento, R
dc.date.coverdateSeptiembre 2003
dc.identifier.conferenceidevents120355
dc.identifier.ulpgces
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.event.eventsstartdate19-05-2003-
crisitem.event.eventsstartdate19-05-2003-
crisitem.event.eventsenddate21-05-2003-
crisitem.event.eventsenddate21-05-2003-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-1838-3073-
crisitem.author.orcid0000-0003-4323-8097-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameSosa González, Carlos Javier-
crisitem.author.fullNameMontiel Nelson, Juan Antonio-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
Appears in Collections:Actas de congresos
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