Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/44404
DC FieldValueLanguage
dc.contributor.authorCervero, T.en_US
dc.contributor.authorGómez, A.en_US
dc.contributor.authorLópez, S.en_US
dc.contributor.authorSarmiento, R.en_US
dc.contributor.authorDondo, J.en_US
dc.contributor.authorRincón, F.en_US
dc.contributor.authorLopez, J. C.en_US
dc.contributor.otherLopez, Sebastian-
dc.contributor.otherLopez, Jose-
dc.contributor.otherDondo Gazzano, Julio-
dc.date.accessioned2018-11-21T22:47:00Z-
dc.date.available2018-11-21T22:47:00Z-
dc.date.issued2013en_US
dc.identifier.isbn9780819495617en_US
dc.identifier.issn0277-786Xen_US
dc.identifier.urihttp://hdl.handle.net/10553/44404-
dc.description.abstractOne of the limiting factors that have prevented a widely dissemination of the reconfigurable technology is the absence of an appropriate model for certain target applications capable of offering a reliable control. Moreover, the lack of flexible and easy-to-use scheduling and management systems are also relevant drawbacks to be considered. Under static scenarios, it is relatively easy to schedule and manage the reconfiguration process since all the variations corresponding to predetermined and well-known tasks. However, the difficulty increases when the adaptation needs of the overall system change semi-randomly according to the environmental fluctuations. In this context, this work proposes a change in the paradigm of dynamically reconfigurable systems, by attending to the dynamically reconfigurable control problematic as a whole, in which the scheduling and the placement issues are packed together as a hierarchical management structure, interacting together as one entity from the system point of view, but performing their tasks with certain degree of independence each other. In this sense, the top hierarchical level corresponds with a dynamic scheduler in charge of planning and adjusting all the reconfigurable modules according to the variations of the external stimulus. The lower level interacts with the physical layer of the device by means of instantiating, relocating, removing a reconfigurable module following the scheduler's instructions.In regards to how fast is the proposed solution, the total partial reconfiguration time achieved with this proposal has been measured and compared with other two approaches: 1) using traditional Xilinx's tools; 2) using an optimized version of the Xilinx's drivers. The collected numbers demonstrate that our solution reaches a gain up to 10 times faster than the other approaches.
dc.languagespaen_US
dc.publisher0277-786Xen_US
dc.relation.ispartofProceedings of SPIE - The International Society for Optical Engineeringen_US
dc.sourceProceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 8764 (87640J)en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherEmbedded systems Scheduling FPGA Placement Dynamic reconfigurationen_US
dc.titleA hierarchical scheduling and management solution for dynamic reconfiguration in FPGA-based embedded systemsen_US
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.typeConferenceObjectes
dc.relation.conferenceConference on VLSI Circuits and Systems VI
dc.relation.conference6th Conference on VLSI Circuits and Systems
dc.identifier.doi10.1117/12.2021270
dc.identifier.scopus84881193745-
dc.identifier.isi000323576000018-
dcterms.isPartOfVlsi Circuits And Systems Vi-
dcterms.sourceVlsi Circuits And Systems Vi[ISSN 0277-786X],v. 8764-
dc.contributor.authorscopusid34978225000-
dc.contributor.authorscopusid55702521790-
dc.contributor.authorscopusid57187722000-
dc.contributor.authorscopusid35609452100-
dc.contributor.authorscopusid24474434400-
dc.contributor.authorscopusid13613157500-
dc.contributor.authorscopusid55685084700-
dc.identifier.issue87640J-
dc.relation.volume8764-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.identifier.wosWOS:000323576000018-
dc.contributor.daisngid5352902-
dc.contributor.daisngid22119814-
dc.contributor.daisngid465777-
dc.contributor.daisngid116294-
dc.contributor.daisngid2345059-
dc.contributor.daisngid848261-
dc.contributor.daisngid846472-
dc.identifier.investigatorRIDL-8108-2014-
dc.identifier.investigatorRIDL-6046-2014-
dc.identifier.investigatorRIDNo ID-
dc.identifier.externalWOS:000323576000018-
dc.contributor.wosstandardWOS:Cervero, T
dc.contributor.wosstandardWOS:Gomez, A
dc.contributor.wosstandardWOS:Lopez, S
dc.contributor.wosstandardWOS:Sarmiento, R
dc.contributor.wosstandardWOS:Dondo, J
dc.contributor.wosstandardWOS:Rincon, F
dc.contributor.wosstandardWOS:Lopez, JC
dc.date.coverdateAgosto 2013
dc.identifier.conferenceidevents120838
dc.identifier.ulpgces
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptIUMA Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-2360-6721-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.orcid0000-0002-2360-6721-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameCervero García, Teresa Gloria-
crisitem.author.fullNameGómez Rebordinos, Ana-
crisitem.author.fullNameLópez Suárez, Sebastián-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
crisitem.author.fullNameLópez Suárez, Sebastián-
crisitem.event.eventsstartdate24-04-2013-
crisitem.event.eventsstartdate24-04-2013-
crisitem.event.eventsenddate26-04-2013-
crisitem.event.eventsenddate26-04-2013-
Appears in Collections:Actas de congresos
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