Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/44401
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cervero, T. | en_US |
dc.contributor.author | López, S. | en_US |
dc.contributor.author | Callicó, G. M. | en_US |
dc.contributor.author | López Feliciano, José Francisco | en_US |
dc.contributor.author | Sarmiento, R. | en_US |
dc.contributor.other | Callico, Gustavo Marrero | - |
dc.contributor.other | Lopez, Sebastian | - |
dc.date.accessioned | 2018-11-21T22:45:33Z | - |
dc.date.available | 2018-11-21T22:45:33Z | - |
dc.date.issued | 2014 | en_US |
dc.identifier.issn | 0026-2692 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/44401 | - |
dc.description.abstract | Hyperspectral imaging instruments capture and collect hundreds of different wavelength data corresponding to the same surface. As a result, tons of information must be stored, processed and transmitted to ground. However, the downlink bandwidth is limited, and transmitting all data from the satellite to ground is a slow task that jeopardizes the use of this information for applications under real-time or near real-time constraints. This is the reason why most of the research activity is moving towards developing solutions which are able to process this data on-board, sending back to ground only relevant information. In this context, this paper presents three different FPGA-based architectures, implemented on an FPGA, which perform the Modified Vertex Component Analysis (MVCA) algorithm, as part of the hyperspectral linear unmixing processing chain. As a consequence, not only high performance but flexible and reusable designs have been designed. Moreover, final results demonstrate the influence of the implemented parallelization methodology over the final performance which motivates the system adaptivity through the scalability feature. | en_US |
dc.language | spa | en_US |
dc.publisher | 0026-2692 | - |
dc.relation.ispartof | Microelectronics | en_US |
dc.source | Microelectronics Journal[ISSN 0026-2692],v. 45, p. 1292-1303 | en_US |
dc.subject | 3307 Tecnología electrónica | en_US |
dc.subject.other | FPGA | en_US |
dc.subject.other | Hyperspectral imaging | en_US |
dc.subject.other | MVCA | en_US |
dc.subject.other | Scalability | en_US |
dc.title | Scalable architectures for real-time hyperspectral unmixing | en_US |
dc.type | info:eu-repo/semantics/Article | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1016/j.mejo.2014.03.010 | en_US |
dc.identifier.scopus | 84908697954 | - |
dc.identifier.isi | 000343345600009 | - |
dcterms.isPartOf | Microelectronics Journal | - |
dcterms.source | Microelectronics Journal[ISSN 0026-2692],v. 45 (10), p. 1292-1303 | - |
dc.contributor.authorscopusid | 34978225000 | - |
dc.contributor.authorscopusid | 57187722000 | - |
dc.contributor.authorscopusid | 56006321500 | - |
dc.contributor.authorscopusid | 7404444793 | - |
dc.contributor.authorscopusid | 35609452100 | - |
dc.description.lastpage | 1303 | en_US |
dc.description.firstpage | 1292 | en_US |
dc.relation.volume | 45 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Artículo | en_US |
dc.identifier.wos | WOS:000343345600009 | - |
dc.contributor.daisngid | 5352902 | - |
dc.contributor.daisngid | 465777 | - |
dc.contributor.daisngid | 506422 | - |
dc.contributor.daisngid | 2138004 | - |
dc.contributor.daisngid | 116294 | - |
dc.identifier.investigatorRID | L-6036-2014 | - |
dc.identifier.investigatorRID | No ID | - |
dc.identifier.external | WOS:000343345600009 | - |
dc.utils.revision | Sí | en_US |
dc.contributor.wosstandard | WOS:Cervero, T | - |
dc.contributor.wosstandard | WOS:Lopez, S | - |
dc.contributor.wosstandard | WOS:Callico, GM | - |
dc.contributor.wosstandard | WOS:Lopez, JF | - |
dc.contributor.wosstandard | WOS:Sarmiento, R | - |
dc.date.coverdate | Enero 2014 | en_US |
dc.identifier.ulpgc | Sí | en_US |
dc.contributor.buulpgc | BU-TEL | en_US |
dc.description.jcr | 0,836 | |
dc.description.jcrq | Q3 | |
dc.description.scie | SCIE | |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0002-2360-6721 | - |
crisitem.author.orcid | 0000-0002-3784-5504 | - |
crisitem.author.orcid | 0000-0002-6304-2801 | - |
crisitem.author.orcid | 0000-0002-4843-0507 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Cervero García, Teresa Gloria | - |
crisitem.author.fullName | López Suárez, Sebastián Miguel | - |
crisitem.author.fullName | Marrero Callicó, Gustavo Iván | - |
crisitem.author.fullName | López Feliciano, José Francisco | - |
crisitem.author.fullName | Sarmiento Rodríguez, Roberto | - |
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