Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/42121
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Mozos, Daniel | - |
dc.contributor.author | Lopez, Sebastian | - |
dc.contributor.author | Fernandez, Daniel | - |
dc.contributor.author | Gonzalez, Carlos | - |
dc.date.accessioned | 2018-10-10T12:01:28Z | - |
dc.date.available | 2018-10-10T12:01:28Z | - |
dc.date.issued | 2019 | - |
dc.identifier.issn | 1861-8200 | - |
dc.identifier.other | WoS | - |
dc.identifier.uri | http://hdl.handle.net/10553/42121 | - |
dc.description.abstract | Remotely sensed hyperspectral imaging is a very active research area, with numerous contributions in the recent scientific literature. The analysis of these images represents an extremely complex procedure from a computational point of view, mainly due to the high dimensionality of the data and the inherent complexity of the state-of-the-art algorithms for processing hyperspectral images. This computational cost represents a significant disadvantage in applications that require real-time response, such as fire tracing, prevention and monitoring of natural disasters, chemical spills, and other environmental pollution. Many of these algorithms consider, as one of their fundamental stages to fully process a hyperspectral image, a dimensionality reduction in order to remove noise and redundant information in the hyperspectral images under analysis. Therefore, it is possible to significantly reduce the size of the images, and hence, alleviate data storage requirements. However, this step is not exempt of computationally complex matrix operations, such as the computation of the eigenvalues and the eigenvectors of large and dense matrices. Hence, for the aforementioned applications in which prompt replies are mandatory, this dimensionality reduction must be considerably accelerated, typically through the utilization of high-performance computing platforms. For this purpose, reconfigurable hardware solutions such as field-programmable gate arrays have been consolidated during the last years as one of the standard choices for the fast processing of hyperspectral remotely sensed images due to their smaller size, weight and power consumption when compared with other high-performance computing systems. In this paper, we propose the implementation in reconfigurable hardware of the principal component analysis (PCA) algorithm to carry out the dimensionality reduction in hyperspectral images. Experimental results demonstrate that our hardware version of the PCA algorithm significantly outperforms a commercial software version, which makes our reconfigurable system appealing for onboard hyperspectral data processing. Furthermore, our implementation exhibits real-time performance with regard to the time that the targeted hyperspectral instrument takes to collect the image data. | - |
dc.language | eng | - |
dc.relation.ispartof | Journal of Real-Time Image Processing | - |
dc.source | Journal of Real-Time Image Processing [ISSN 1861-8200], v. 16, p. 1395–1406 | - |
dc.subject | 2203 Electrónica | - |
dc.subject | 220990 Tratamiento digital. Imágenes | - |
dc.subject.other | Dimensionality reduction | - |
dc.subject.other | Field-programmable gate arrays (FPGAs) | - |
dc.subject.other | Hyperspectral imaging | - |
dc.subject.other | Principal component analysis (PCA) | - |
dc.subject.other | Reconfigurable hardware | - |
dc.title | FPGA implementation of the principal component analysis algorithm for dimensionality reduction of hyperspectral images | - |
dc.type | info:eu-repo/semantics/Article | - |
dc.type | Article | - |
dc.identifier.doi | 10.1007/s11554-016-0650-7 | - |
dc.identifier.scopus | 84994304799 | - |
dc.identifier.isi | 000489318600005 | - |
dc.contributor.authorscopusid | 57190671691 | - |
dc.contributor.authorscopusid | 35199832800 | - |
dc.contributor.authorscopusid | 6603237007 | - |
dc.contributor.authorscopusid | 57187722000 | - |
dc.identifier.eissn | 1861-8219 | - |
dc.description.lastpage | 1406 | - |
dc.identifier.issue | 5 | - |
dc.description.firstpage | 1395 | - |
dc.relation.volume | 16 | - |
dc.investigacion | Ingeniería y Arquitectura | - |
dc.type2 | Artículo | - |
dc.contributor.daisngid | 4784599 | - |
dc.contributor.daisngid | 1391678 | - |
dc.contributor.daisngid | 31511302 | - |
dc.contributor.daisngid | 465777 | - |
dc.description.numberofpages | 12 | - |
dc.utils.revision | No | - |
dc.contributor.wosstandard | WOS:Fernandez, D | - |
dc.contributor.wosstandard | WOS:Gonzalez, C | - |
dc.contributor.wosstandard | WOS:Mozos, D | - |
dc.contributor.wosstandard | WOS:Lopez, S | - |
dc.identifier.ulpgc | Sí | es |
dc.description.sjr | 0,445 | |
dc.description.jcr | 1,968 | |
dc.description.sjrq | Q2 | |
dc.description.jcrq | Q3 | |
dc.description.scie | SCIE | |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0002-2360-6721 | - |
crisitem.author.orcid | 0000-0002-2360-6721 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | López Suárez, Sebastián Miguel | - |
crisitem.author.fullName | López Suárez, Sebastián Miguel | - |
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