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Title: | Hands-on experience for undergraduate Computer Architecture courses using Nios V-based soft SoCs and real board | Authors: | Benítez Díaz, Domingo | UNESCO Clasification: | 33 Ciencias tecnológicas | Issue Date: | 2024 | Conference: | 2024 First Annual Soft RISC-V Systems Workshop | Abstract: | Problem statement. In the Computer Architecture course of Computer Science and Engineering undergraduate programs , there are often labs with simulation tools. This teaching method can give students misleading ideas about how hardware works because they are observing the behavior of a computer program, not the real hardware. In addition, the financial investment required to use real and non-reconfigurable equipment in a performance-oriented Computer Architecture course is relatively high. Methodology. This paper proposes a set of hands-on laboratory experiments for undergraduate students enrolled in a Computer Architecture course focused on performance evaluation of RISC-V architecture computers. The most prominent feature of these labs is the multiple reconfiguration of a single real FPGA-based board. All FPGA configurations build soft system-on-chip computers based on Nios V processors. Main findings. The methodology proposed here has been used in the training of more than 1,000 computer science students for more than 10 years. We have observed that this methodology allows: all students to interact with a hardware system that is more realistic than the one modeled by simulators, each student to interact with multiple system-on-chip computers of very different architectures without having to change physical equipment, and that low-cost hardware can be used for Computer Architecture labs where performance evaluation is an important pedagogical goal. Principal conclusion. This method of teaching gives students a more realistic understanding of computer architecture than teaching with hardware simulators. In addition, by using reconfigurable hardware, the lab infrastructure is less costly than using various non-reconfigurable hardware | URI: | https://accedacris.ulpgc.es/handle/10553/137388 |
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