Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/134722
Campo DC Valoridioma
dc.contributor.authorSánchez Clemente, Antonio Joséen_US
dc.contributor.authorChatziantoniou, Panagiotisen_US
dc.contributor.authorBartrina-Rapesta, Joanen_US
dc.contributor.authorBarrios Alfaro,Yubalen_US
dc.contributor.authorTorres Fau, Samuelen_US
dc.contributor.authorBerrojo, Luisen_US
dc.contributor.authorSantos Falcón, Lucanaen_US
dc.contributor.authorSarmiento Rodríguez, Robertoen_US
dc.date.accessioned2024-11-18T10:06:02Z-
dc.date.available2024-11-18T10:06:02Z-
dc.date.issued2024en_US
dc.identifier.urihttp://hdl.handle.net/10553/134722-
dc.description.abstractThis work presents a new compression IP core for lossless and near-lossless compression of multi- and hyperspectral data, compliant with the CCSDS-123.0-B-2 compression standard. This IP core supports most of the standard features, including all entropy encoder options and the most common input sample arrangement formats. It features an adaptable preprocessing stage capable of working in both lossless and near-lossless regimes while supporting all prediction and local sum modes, as well as optimized implementations of all entropy encoder variants. Thanks to this, the IP core can achieve a performance of 1 clock cycle per sample for a subset of the compressor configuration space, even in the near-lossless regime. The goal is to have a technology-independent reusable IP core that can be used as a building block in multiple missions, devices and technologies. This IP core is being developed in the scope of the ESA project 4000136723/22/NL/CRS, and it will join the ESA portfolio of IP cores for space missions.en_US
dc.languageengen_US
dc.relationLossless/lossy multispectral & hyperspectral compression IP coreen_US
dc.subject330790 Microelectrónicaen_US
dc.titleLossless and Lossy Hyperspectral Compression IP Core for Space Missionsen_US
dc.typeinfo:eu-repo/semantics/conferenceobjecten_US
dc.typeConferenceObjecten_US
dc.relation.conference9th International Workshop on On-Board Payload Data Compression (OBPDC 2024)en_US
dc.identifier.doihttps://doi.org/10.5281/zenodo.13863326en_US
dc.description.lastpage7en_US
dc.description.firstpage1en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.description.numberofpages7en_US
dc.utils.revisionen_US
dc.date.coverdateSeptiembre 2024en_US
dc.identifier.ulpgcen_US
dc.contributor.buulpgcBU-TELen_US
item.grantfulltextopen-
item.fulltextCon texto completo-
crisitem.event.eventsstartdate02-10-2024-
crisitem.event.eventsenddate04-10-2024-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-2142-7885-
crisitem.author.orcid0000-0001-6186-9971-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameSánchez Clemente,Antonio José-
crisitem.author.fullNameBarrios Alfaro,Yubal-
crisitem.author.fullNameTorres Fau, Samuel-
crisitem.author.fullNameSantos Falcón, Lucana-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
crisitem.project.principalinvestigatorSarmiento Rodríguez, Roberto-
Colección:Actas de congresos
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